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authorRussell King <rmk+kernel@arm.linux.org.uk>2013-04-18 19:15:44 +0200
committerRussell King <rmk+kernel@arm.linux.org.uk>2013-04-18 21:08:04 +0200
commitbca7a5a04933700a8bde4ea5798119607a8b0436 (patch)
tree9d1c2663fa2cd60d434d1603d192bbba3ae3d706 /arch/arm/mach-shmobile
parentARM: smp: flush L1 cache in cpu_die() (diff)
downloadlinux-bca7a5a04933700a8bde4ea5798119607a8b0436.tar.xz
linux-bca7a5a04933700a8bde4ea5798119607a8b0436.zip
ARM: cpu hotplug: remove majority of cache flushing from platforms
Remove the majority of cache flushing calls from the individual platform files. This is now handled by the core code. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-shmobile')
-rw-r--r--arch/arm/mach-shmobile/smp-sh73a0.c8
1 files changed, 0 insertions, 8 deletions
diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c
index acb46a94ccdf..2f1ef1bc805d 100644
--- a/arch/arm/mach-shmobile/smp-sh73a0.c
+++ b/arch/arm/mach-shmobile/smp-sh73a0.c
@@ -119,14 +119,6 @@ static int sh73a0_cpu_kill(unsigned int cpu)
static void sh73a0_cpu_die(unsigned int cpu)
{
- /*
- * The ARM MPcore does not issue a cache coherency request for the L1
- * cache when powering off single CPUs. We must take care of this and
- * further caches.
- */
- dsb();
- flush_cache_all();
-
/* Set power off mode. This takes the CPU out of the MP cluster */
scu_power_mode(scu_base_addr(), SCU_PM_POWEROFF);