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authorDinh Nguyen <dinguyen@altera.com>2013-02-12 00:30:33 +0100
committerOlof Johansson <olof@lixom.net>2013-02-12 04:37:26 +0100
commitd6dd735f4bda19bfe07d96d9025c94c4619d4596 (patch)
treec8c688aacf4c7315ed7af8ade6508f511ac28aab /arch/arm/mach-socfpga/headsmp.S
parentarm: Add v7_invalidate_l1 to cache-v7.S (diff)
downloadlinux-d6dd735f4bda19bfe07d96d9025c94c4619d4596.tar.xz
linux-d6dd735f4bda19bfe07d96d9025c94c4619d4596.zip
arm: socfpga: Add SMP support for actual socfpga harware
Because the CPU1 start address is different for socfpga-vt and socfpga-cyclone5, we add code to use the correct CPU1 start addr. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: Pavel Machek <pavel@denx.de> Cc: Russell King <linux@arm.linux.org.uk> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Olof Johansson <olof@lixom.net> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-socfpga/headsmp.S')
-rw-r--r--arch/arm/mach-socfpga/headsmp.S16
1 files changed, 12 insertions, 4 deletions
diff --git a/arch/arm/mach-socfpga/headsmp.S b/arch/arm/mach-socfpga/headsmp.S
index f09b1283ffca..9004bfb1756e 100644
--- a/arch/arm/mach-socfpga/headsmp.S
+++ b/arch/arm/mach-socfpga/headsmp.S
@@ -13,13 +13,21 @@
__CPUINIT
.arch armv7-a
-#define CPU1_START_ADDR 0xffd08010
-
ENTRY(secondary_trampoline)
- movw r0, #:lower16:CPU1_START_ADDR
- movt r0, #:upper16:CPU1_START_ADDR
+ movw r2, #:lower16:cpu1start_addr
+ movt r2, #:upper16:cpu1start_addr
+
+ /* The socfpga VT cannot handle a 0xC0000000 page offset when loading
+ the cpu1start_addr, we bit clear it. Tested on HW and VT. */
+ bic r2, r2, #0x40000000
+ ldr r0, [r2]
ldr r1, [r0]
bx r1
ENTRY(secondary_trampoline_end)
+
+ENTRY(socfpga_secondary_startup)
+ bl v7_invalidate_l1
+ b secondary_startup
+ENDPROC(socfpga_secondary_startup)