summaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-socfpga/platsmp.c
diff options
context:
space:
mode:
authorOlof Johansson <olof@lixom.net>2014-10-24 06:01:02 +0200
committerOlof Johansson <olof@lixom.net>2014-10-24 06:01:02 +0200
commitbcd09f17cbcc88ff32e59eddc7faab1964ae3596 (patch)
treeeb2b3c1f78a2e1c2cf916f90673aca76b8a903b4 /arch/arm/mach-socfpga/platsmp.c
parentARM: multi_v7_defconfig: enable CONFIG_MMC_DW_ROCKCHIP (diff)
parentARM: zynq: DT: trivial: Fix mc node (diff)
downloadlinux-bcd09f17cbcc88ff32e59eddc7faab1964ae3596.tar.xz
linux-bcd09f17cbcc88ff32e59eddc7faab1964ae3596.zip
Merge tag 'zynq-dt-fixes-for-3.18' of https://github.com/Xilinx/linux-xlnx into fixes
Merge "Xilinx Zynq dt fixes for v3.18" from Michal Simek: arm: Xilinx Zynq DT fixes for v3.18 - Fix gem register size - Fix OPP - Add missing references - Trivial cleanup * tag 'zynq-dt-fixes-for-3.18' of https://github.com/Xilinx/linux-xlnx: ARM: zynq: DT: trivial: Fix mc node ARM: zynq: DT: Add cadence watchdog node ARM: zynq: DT: Add missing reference for memory-controller ARM: zynq: DT: Add missing reference for ADC ARM: zynq: DT: Add missing address for L2 pl310 ARM: zynq: DT: Remove 222 MHz OPP ARM: zynq: DT: Fix GEM register area size Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-socfpga/platsmp.c')
0 files changed, 0 insertions, 0 deletions