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authorRobin Holt <holt@sgi.com>2013-07-09 01:01:40 +0200
committerLinus Torvalds <torvalds@linux-foundation.org>2013-07-09 19:33:29 +0200
commit7b6d864b48d95e6ea1df7df64475b9cb9616dcf9 (patch)
treebc5b3c1c6021e19e51f7f5afe5fb0fbbaef9f7a3 /arch/arm/mach-socfpga/socfpga.c
parentreboot: arm: prepare reboot_mode for moving to generic kernel code (diff)
downloadlinux-7b6d864b48d95e6ea1df7df64475b9cb9616dcf9.tar.xz
linux-7b6d864b48d95e6ea1df7df64475b9cb9616dcf9.zip
reboot: arm: change reboot_mode to use enum reboot_mode
Preparing to move the parsing of reboot= to generic kernel code forces the change in reboot_mode handling to use the enum. [akpm@linux-foundation.org: fix arch/arm/mach-socfpga/socfpga.c] Signed-off-by: Robin Holt <holt@sgi.com> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Russ Anderson <rja@sgi.com> Cc: Robin Holt <holt@sgi.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/arm/mach-socfpga/socfpga.c')
-rw-r--r--arch/arm/mach-socfpga/socfpga.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/mach-socfpga/socfpga.c b/arch/arm/mach-socfpga/socfpga.c
index 8ea11b472b91..bfce9641e32f 100644
--- a/arch/arm/mach-socfpga/socfpga.c
+++ b/arch/arm/mach-socfpga/socfpga.c
@@ -19,6 +19,7 @@
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
+#include <linux/reboot.h>
#include <asm/hardware/cache-l2x0.h>
#include <asm/mach/arch.h>
@@ -89,13 +90,13 @@ static void __init socfpga_init_irq(void)
socfpga_sysmgr_init();
}
-static void socfpga_cyclone5_restart(char mode, const char *cmd)
+static void socfpga_cyclone5_restart(enum reboot_mode mode, const char *cmd)
{
u32 temp;
temp = readl(rst_manager_base_addr + SOCFPGA_RSTMGR_CTRL);
- if (mode == 'h')
+ if (mode == REBOOT_HARD)
temp |= RSTMGR_CTRL_SWCOLDRSTREQ;
else
temp |= RSTMGR_CTRL_SWWARMRSTREQ;