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authorAlan Tull <atull@opensource.altera.com>2015-06-05 15:24:52 +0200
committerKevin Hilman <khilman@linaro.org>2015-06-11 01:02:11 +0200
commit44fd8c7d4005f660f48679439f0a54225ba234a4 (patch)
tree86d07642758f6c26b835f9b24bad955cd0daa9d5 /arch/arm/mach-socfpga/socfpga.c
parentARM: socfpga: add CPU_METHOD_OF_DECLARE for Arria 10 (diff)
downloadlinux-44fd8c7d4005f660f48679439f0a54225ba234a4.tar.xz
linux-44fd8c7d4005f660f48679439f0a54225ba234a4.zip
ARM: socfpga: support suspend to ram
Add code that requests that the sdr controller go into self-refresh mode. This code is run from ocram. Suspend-to-RAM and EDAC support are mutually exclusive on SOCFPGA. If the EDAC is enabled, it will prevent the platform from going into suspend. Example of how to request to suspend to ram: $ echo enabled > \ /sys/devices/soc/ffc02000.serial0/tty/ttyS0/power/wakeup $ echo -n mem > /sys/power/state Signed-off-by: Alan Tull <atull@opensource.altera.com> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by: Kevin Hilman <khilman@linaro.org>
Diffstat (limited to 'arch/arm/mach-socfpga/socfpga.c')
-rw-r--r--arch/arm/mach-socfpga/socfpga.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/mach-socfpga/socfpga.c b/arch/arm/mach-socfpga/socfpga.c
index a154920b06ab..19643a756c48 100644
--- a/arch/arm/mach-socfpga/socfpga.c
+++ b/arch/arm/mach-socfpga/socfpga.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2012 Altera Corporation
+ * Copyright (C) 2012-2015 Altera Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -29,6 +29,7 @@
void __iomem *sys_manager_base_addr;
void __iomem *rst_manager_base_addr;
+void __iomem *sdr_ctl_base_addr;
unsigned long socfpga_cpu1start_addr;
void __init socfpga_sysmgr_init(void)
@@ -49,6 +50,9 @@ void __init socfpga_sysmgr_init(void)
np = of_find_compatible_node(NULL, NULL, "altr,rst-mgr");
rst_manager_base_addr = of_iomap(np, 0);
+
+ np = of_find_compatible_node(NULL, NULL, "altr,sdr-ctl");
+ sdr_ctl_base_addr = of_iomap(np, 0);
}
static void __init socfpga_init_irq(void)