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authorRussell King <rmk+kernel@arm.linux.org.uk>2014-03-19 13:16:36 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2014-05-30 01:50:02 +0200
commit2edb89cd8e915d2d826f5704b80da28bde688051 (patch)
tree569f8000d9d528e274f108b31ea14cd0e9c3b188 /arch/arm/mach-socfpga
parentARM: l2c: rockchip: convert to generic l2c OF initialisation (diff)
downloadlinux-2edb89cd8e915d2d826f5704b80da28bde688051.tar.xz
linux-2edb89cd8e915d2d826f5704b80da28bde688051.zip
ARM: l2c: shmobile: remove cache size override
The cache size should already be present in the L2 cache auxiliary control register: it is part of the integration process to configure the hardware IP. Most platforms get this right, yet still many cargo-cult program, and assume that they always need specifying to the L2 cache code. Remove them so we can find out which really need this. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-socfpga')
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