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author | Thor Thayer <tthayer@opensource.altera.com> | 2016-02-10 20:26:23 +0100 |
---|---|---|
committer | Borislav Petkov <bp@suse.de> | 2016-02-11 12:32:11 +0100 |
commit | 4d1138380ed6f1cca622e7de8bcc877c04a52d0d (patch) | |
tree | 44625a01cd4507dfb90c728c299700b5d4726c7f /arch/arm/mach-socfpga | |
parent | ARM: dts: Add Altera L2 Cache and OCRAM EDAC entries (diff) | |
download | linux-4d1138380ed6f1cca622e7de8bcc877c04a52d0d.tar.xz linux-4d1138380ed6f1cca622e7de8bcc877c04a52d0d.zip |
ARM: socfpga: Enable L2 cache ECC on startup
Enable ECC for L2 cache on machine startup. The ECC has to be enabled
before data is stored in memory otherwise the ECC will fail on reads.
Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: devicetree@vger.kernel.org
Cc: galak@codeaurora.org
Cc: grant.likely@linaro.org
Cc: ijc+devicetree@hellion.org.uk
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux@arm.linux.org.uk
Cc: linux-doc@vger.kernel.org
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: mark.rutland@arm.com
Cc: m.chehab@samsung.com
Cc: pawel.moll@arm.com
Cc: robh+dt@kernel.org
Cc: Russell King <linux@arm.linux.org.uk>
Link: http://lkml.kernel.org/r/1455132384-17108-3-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov <bp@suse.de>
Diffstat (limited to 'arch/arm/mach-socfpga')
-rw-r--r-- | arch/arm/mach-socfpga/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/mach-socfpga/core.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-socfpga/l2_cache.c | 41 | ||||
-rw-r--r-- | arch/arm/mach-socfpga/socfpga.c | 2 |
4 files changed, 45 insertions, 0 deletions
diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile index b8f9e238e4ab..e9ab7c9444ff 100644 --- a/arch/arm/mach-socfpga/Makefile +++ b/arch/arm/mach-socfpga/Makefile @@ -5,3 +5,4 @@ obj-y := socfpga.o obj-$(CONFIG_SMP) += headsmp.o platsmp.o obj-$(CONFIG_SOCFPGA_SUSPEND) += pm.o self-refresh.o +obj-$(CONFIG_EDAC_ALTERA_L2C) += l2_cache.o diff --git a/arch/arm/mach-socfpga/core.h b/arch/arm/mach-socfpga/core.h index 5bc6ea87cdf7..eb55d66a0eac 100644 --- a/arch/arm/mach-socfpga/core.h +++ b/arch/arm/mach-socfpga/core.h @@ -36,6 +36,7 @@ extern void socfpga_init_clocks(void); extern void socfpga_sysmgr_init(void); +void socfpga_init_l2_ecc(void); extern void __iomem *sys_manager_base_addr; extern void __iomem *rst_manager_base_addr; diff --git a/arch/arm/mach-socfpga/l2_cache.c b/arch/arm/mach-socfpga/l2_cache.c new file mode 100644 index 000000000000..e3907ab58d05 --- /dev/null +++ b/arch/arm/mach-socfpga/l2_cache.c @@ -0,0 +1,41 @@ +/* + * Copyright Altera Corporation (C) 2016. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ +#include <linux/io.h> +#include <linux/of_platform.h> +#include <linux/of_address.h> + +void socfpga_init_l2_ecc(void) +{ + struct device_node *np; + void __iomem *mapped_l2_edac_addr; + + np = of_find_compatible_node(NULL, NULL, "altr,socfpga-l2-ecc"); + if (!np) { + pr_err("Unable to find socfpga-l2-ecc in dtb\n"); + return; + } + + mapped_l2_edac_addr = of_iomap(np, 0); + of_node_put(np); + if (!mapped_l2_edac_addr) { + pr_err("Unable to find L2 ECC mapping in dtb\n"); + return; + } + + /* Enable ECC */ + writel(0x01, mapped_l2_edac_addr); + iounmap(mapped_l2_edac_addr); +} diff --git a/arch/arm/mach-socfpga/socfpga.c b/arch/arm/mach-socfpga/socfpga.c index a1c0efaa8794..dd1ff07b0472 100644 --- a/arch/arm/mach-socfpga/socfpga.c +++ b/arch/arm/mach-socfpga/socfpga.c @@ -59,6 +59,8 @@ static void __init socfpga_init_irq(void) { irqchip_init(); socfpga_sysmgr_init(); + if (IS_ENABLED(CONFIG_EDAC_ALTERA_L2C)) + socfpga_init_l2_ecc(); } static void socfpga_cyclone5_restart(enum reboot_mode mode, const char *cmd) |