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author | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-03-19 13:18:02 +0100 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-05-30 01:50:06 +0200 |
commit | adf4b00ebf4e183f36d88d5a5a591c532fb0abe9 (patch) | |
tree | 55f37d9f98f18f8ae6af62b1d0c19ac900b0c5ef /arch/arm/mach-spear/restart.c | |
parent | ARM: l2c: socfpga: convert to generic l2c OF initialisation (diff) | |
download | linux-adf4b00ebf4e183f36d88d5a5a591c532fb0abe9.tar.xz linux-adf4b00ebf4e183f36d88d5a5a591c532fb0abe9.zip |
ARM: l2c: spear13xx: remove cache size override
The cache size should already be present in the L2 cache auxiliary
control register: it is part of the integration process to configure
the hardware IP. Most platforms get this right, yet still many
cargo-cult program, and assume that they always need specifying to
the L2 cache code. Remove them so we can find out which really need
this.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-spear/restart.c')
0 files changed, 0 insertions, 0 deletions