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| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-11-21 22:56:56 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-11-21 22:56:56 +0100 |
| commit | 2d13ccaa8797d7e599f3792aed4b1e44b47f94a5 (patch) | |
| tree | 7079c1610373fc6709c3a285a53099beaf21295a /arch/arm/mach-spear6xx/include/mach/entry-macro.S | |
| parent | Merge branch 'restart-cleanup' into restart (diff) | |
| parent | ARM: VIC: remove non MULTI_IRQ_HANDLER support (diff) | |
| download | linux-2d13ccaa8797d7e599f3792aed4b1e44b47f94a5.tar.xz linux-2d13ccaa8797d7e599f3792aed4b1e44b47f94a5.zip | |
Merge branch 'irqchip-consolidation' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into devel-stable
Conflicts:
arch/arm/mach-omap2/board-4430sdp.c
arch/arm/mach-omap2/board-omap4panda.c
arch/arm/mach-omap2/include/mach/omap4-common.h
arch/arm/plat-omap/include/plat/irqs.h
The changes to omap4-common.h were moved to arch/arm/mach-omap2/common.h
and the other trivial conflicts resolved. The now empty ifdef in irqs.h
was also eliminated.
Diffstat (limited to 'arch/arm/mach-spear6xx/include/mach/entry-macro.S')
| -rw-r--r-- | arch/arm/mach-spear6xx/include/mach/entry-macro.S | 36 |
1 files changed, 0 insertions, 36 deletions
diff --git a/arch/arm/mach-spear6xx/include/mach/entry-macro.S b/arch/arm/mach-spear6xx/include/mach/entry-macro.S index 8a0b0ed7b203..d490a910d925 100644 --- a/arch/arm/mach-spear6xx/include/mach/entry-macro.S +++ b/arch/arm/mach-spear6xx/include/mach/entry-macro.S @@ -11,44 +11,8 @@ * warranty of any kind, whether express or implied. */ -#include <asm/hardware/vic.h> -#include <mach/hardware.h> - .macro disable_fiq .endm - .macro get_irqnr_preamble, base, tmp - .endm - .macro arch_ret_to_user, tmp1, tmp2 .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \base, =VA_SPEAR6XX_CPU_VIC_PRI_BASE - ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get status - mov \irqnr, #0 - teq \irqstat, #0 - bne 1001f - ldr \base, =VA_SPEAR6XX_CPU_VIC_SEC_BASE - ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get status - teq \irqstat, #0 - beq 1002f @ this will set/reset - @ zero register - mov \irqnr, #32 -1001: - /* - * Following code will find bit position of least significang - * bit set in irqstat, using following equation - * least significant bit set in n = (n & ~(n-1)) - */ - sub \tmp, \irqstat, #1 @ tmp = irqstat - 1 - mvn \tmp, \tmp @ tmp = ~tmp - and \irqstat, \irqstat, \tmp @ irqstat &= tmp - /* Now, irqstat is = bit no. of 1st bit set in vic irq status */ - clz \tmp, \irqstat @ tmp = leading zeros - - rsb \tmp, \tmp, #0x1F @ tmp = 32 - tmp - 1 - add \irqnr, \irqnr, \tmp - -1002: /* EQ will be set if no irqs pending */ - .endm |