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| author | Thierry Reding <thierry.reding@avionic-design.de> | 2012-11-15 22:07:55 +0100 |
|---|---|---|
| committer | Stephen Warren <swarren@nvidia.com> | 2012-11-15 22:46:23 +0100 |
| commit | 35de7bfe91453fca9bb3154a36ddbb86711e08a0 (patch) | |
| tree | 3cef144fec96935e90e3ba3322d3b7882441b4fd /arch/arm/mach-tegra/board-dt-tegra20.c | |
| parent | ARM: tegra: Tegra30 speedo-based process identification (diff) | |
| download | linux-35de7bfe91453fca9bb3154a36ddbb86711e08a0.tar.xz linux-35de7bfe91453fca9bb3154a36ddbb86711e08a0.zip | |
ARM: tegra: Add AUXDATA for Tegra20 host1x
Add the OF_DEV_AUXDATA table entries required to associate the proper
names with host1x and its children. In turn, this allows the devices to
find the required clocks.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to '')
| -rw-r--r-- | arch/arm/mach-tegra/board-dt-tegra20.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/board-dt-tegra20.c b/arch/arm/mach-tegra/board-dt-tegra20.c index 1198e84677c5..734d9cc87f2e 100644 --- a/arch/arm/mach-tegra/board-dt-tegra20.c +++ b/arch/arm/mach-tegra/board-dt-tegra20.c @@ -94,6 +94,12 @@ struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("nvidia,tegra20-slink", 0x7000D600, "spi_tegra.1", NULL), OF_DEV_AUXDATA("nvidia,tegra20-slink", 0x7000D800, "spi_tegra.2", NULL), OF_DEV_AUXDATA("nvidia,tegra20-slink", 0x7000DA00, "spi_tegra.3", NULL), + OF_DEV_AUXDATA("nvidia,tegra20-host1x", 0x50000000, "host1x", NULL), + OF_DEV_AUXDATA("nvidia,tegra20-dc", 0x54200000, "tegradc.0", NULL), + OF_DEV_AUXDATA("nvidia,tegra20-dc", 0x54240000, "tegradc.1", NULL), + OF_DEV_AUXDATA("nvidia,tegra20-hdmi", 0x54280000, "hdmi", NULL), + OF_DEV_AUXDATA("nvidia,tegra20-dsi", 0x54300000, "dsi", NULL), + OF_DEV_AUXDATA("nvidia,tegra20-tvo", 0x542c0000, "tvo", NULL), {} }; @@ -118,6 +124,9 @@ static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = { { "sbc2", "pll_p", 100000000, false }, { "sbc3", "pll_p", 100000000, false }, { "sbc4", "pll_p", 100000000, false }, + { "host1x", "pll_c", 150000000, false }, + { "disp1", "pll_p", 600000000, false }, + { "disp2", "pll_p", 600000000, false }, { NULL, NULL, 0, 0}, }; |