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authorJoseph Lo <josephl@nvidia.com>2013-07-19 11:25:25 +0200
committerStephen Warren <swarren@nvidia.com>2013-07-19 18:07:14 +0200
commit1b9e6b2745621984b4aad49b0386814815fb15e7 (patch)
tree3b258ce7b8cdfe8cfb3c06d120bbba4dbedfcf70 /arch/arm/mach-tegra/flowctrl.h
parentARM: tegra114: Reprogram GIC CPU interface to bypass IRQ on CPU PM entry (diff)
downloadlinux-1b9e6b2745621984b4aad49b0386814815fb15e7.tar.xz
linux-1b9e6b2745621984b4aad49b0386814815fb15e7.zip
ARM: tegra114: add low level support for CPU idle powered-down mode
The flow controller would take care the power sequence when CPU idle in powered-down mode. It powered gate the CPU when CPU runs into WFI instruction. And wake up the CPU when event be triggered. The sequence is below. * setting wfi bitmap for the CPU as the halt event in the FLOW_CTRL_CPU_HALT_REG to monitor the CPU running into WFI,then power gate it * setting IRQ and FIQ as wake up event to wake up CPU when event triggered Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/flowctrl.h')
-rw-r--r--arch/arm/mach-tegra/flowctrl.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/flowctrl.h b/arch/arm/mach-tegra/flowctrl.h
index 7a29bae799a7..e56a950920f6 100644
--- a/arch/arm/mach-tegra/flowctrl.h
+++ b/arch/arm/mach-tegra/flowctrl.h
@@ -28,6 +28,8 @@
#define FLOW_CTRL_SCLK_RESUME (1 << 27)
#define FLOW_CTRL_HALT_CPU_IRQ (1 << 10)
#define FLOW_CTRL_HALT_CPU_FIQ (1 << 8)
+#define FLOW_CTRL_HALT_GIC_IRQ (1 << 9)
+#define FLOW_CTRL_HALT_GIC_FIQ (1 << 8)
#define FLOW_CTRL_CPU0_CSR 0x8
#define FLOW_CTRL_CSR_INTR_FLAG (1 << 15)
#define FLOW_CTRL_CSR_EVENT_FLAG (1 << 14)