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author | Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | 2012-01-27 17:14:02 +0100 |
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committer | Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | 2012-01-27 17:14:02 +0100 |
commit | 6c02b7b1610f873888af20f291c07730889ff0f9 (patch) | |
tree | 1b33e6642cc81605b8d37c0bda0abff0ba64fa2d /arch/arm/mach-tegra/include/mach/irqs.h | |
parent | x86: xen: size struct xen_spinlock to always fit in arch_spinlock_t (diff) | |
parent | Linux 3.3-rc1 (diff) | |
download | linux-6c02b7b1610f873888af20f291c07730889ff0f9.tar.xz linux-6c02b7b1610f873888af20f291c07730889ff0f9.zip |
Merge commit 'v3.3-rc1' into stable/for-linus-fixes-3.3
* commit 'v3.3-rc1': (9775 commits)
Linux 3.3-rc1
x86, syscall: Need __ARCH_WANT_SYS_IPC for 32 bits
qnx4: don't leak ->BitMap on late failure exits
qnx4: reduce the insane nesting in qnx4_checkroot()
qnx4: di_fname is an array, for crying out loud...
KEYS: Permit key_serial() to be called with a const key pointer
keys: fix user_defined key sparse messages
ima: fix cred sparse warning
uml: fix compile for x86-64
MPILIB: Add a missing ENOMEM check
tpm: fix (ACPI S3) suspend regression
nvme: fix merge error due to change of 'make_request_fn' fn type
xen: using EXPORT_SYMBOL requires including export.h
gpio: tps65910: Use correct offset for gpio initialization
acpi/apei/einj: Add extensions to EINJ from rev 5.0 of acpi spec
intel_idle: Split up and provide per CPU initialization func
ACPI processor: Remove unneeded variable passed by acpi_processor_hotadd_init V2
tg3: Fix single-vector MSI-X code
openvswitch: Fix multipart datapath dumps.
ipv6: fix per device IP snmp counters
...
Diffstat (limited to 'arch/arm/mach-tegra/include/mach/irqs.h')
-rw-r--r-- | arch/arm/mach-tegra/include/mach/irqs.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/include/mach/irqs.h b/arch/arm/mach-tegra/include/mach/irqs.h index 73265af4dda3..a2146cd6867d 100644 --- a/arch/arm/mach-tegra/include/mach/irqs.h +++ b/arch/arm/mach-tegra/include/mach/irqs.h @@ -25,7 +25,6 @@ #define IRQ_LOCALTIMER 29 -#ifdef CONFIG_ARCH_TEGRA_2x_SOC /* Primary Interrupt Controller */ #define INT_PRI_BASE (INT_GIC_BASE + 32) #define INT_TMR1 (INT_PRI_BASE + 0) @@ -178,6 +177,5 @@ #define NR_BOARD_IRQS 32 #define NR_IRQS (INT_BOARD_BASE + NR_BOARD_IRQS) -#endif #endif |