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| author | Hiroshi Doyu <hdoyu@nvidia.com> | 2013-01-22 06:52:02 +0100 |
|---|---|---|
| committer | Stephen Warren <swarren@nvidia.com> | 2013-01-28 18:41:18 +0100 |
| commit | 909444ab20629ebc4478642b660a391700aa7e33 (patch) | |
| tree | 20bf347dd68da2b68c9adc6878612e7cd3e4b5ee /arch/arm/mach-tegra/platsmp.c | |
| parent | ARM: Add API to detect SCU base address from CP15 (diff) | |
| download | linux-909444ab20629ebc4478642b660a391700aa7e33.tar.xz linux-909444ab20629ebc4478642b660a391700aa7e33.zip | |
ARM: tegra: Skip scu_enable(scu_base) if not Cortex A9
Skip scu_enable(scu_base) if CPU is not Cortex A9 with SCU.
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/platsmp.c')
| -rw-r--r-- | arch/arm/mach-tegra/platsmp.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c index 79fa7857d68d..8127d766fcfa 100644 --- a/arch/arm/mach-tegra/platsmp.c +++ b/arch/arm/mach-tegra/platsmp.c @@ -36,8 +36,6 @@ extern void tegra_secondary_startup(void); -static void __iomem *scu_base = IO_ADDRESS(TEGRA_ARM_PERIF_BASE); - #define EVP_CPU_RESET_VECTOR \ (IO_ADDRESS(TEGRA_EXCEPTION_VECTORS_BASE) + 0x100) @@ -151,7 +149,8 @@ static void __init tegra_smp_init_cpus(void) static void __init tegra_smp_prepare_cpus(unsigned int max_cpus) { tegra_cpu_reset_handler_init(); - scu_enable(scu_base); + if (scu_a9_has_base()) + scu_enable(IO_ADDRESS(scu_a9_get_base())); } struct smp_operations tegra_smp_ops __initdata = { |