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authorJoseph Lo <josephl@nvidia.com>2013-07-03 11:50:38 +0200
committerStephen Warren <swarren@nvidia.com>2013-07-19 18:08:05 +0200
commitac2527bfc21739b77d687df1bfc4e973103fef7b (patch)
treee217d872db97681d551caf07f38129a8f3fa473f /arch/arm/mach-tegra/sleep.h
parentARM: tegra: do v7_invalidate_l1 only when CPU is Cortex-A9 (diff)
downloadlinux-ac2527bfc21739b77d687df1bfc4e973103fef7b.tar.xz
linux-ac2527bfc21739b77d687df1bfc4e973103fef7b.zip
ARM: tegra: add a flag for tegra_disable_clean_inv_dcache to do LoUIS or ALL
Adding a flag for tegra_disable_clean_inv_dcache to flush cache as LoUIS or ALL. After this patch, the v7_flush_dcache_louis is used for CPU hotplug and CPU suspend in CPU power down (e.g. CPU idle power-down mode) case. And the v7_flush_dcache_all is used for CPU cluster power down (e.g. suspend to LP2 mode). Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/sleep.h')
-rw-r--r--arch/arm/mach-tegra/sleep.h6
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/sleep.h b/arch/arm/mach-tegra/sleep.h
index 98b7da698f2b..e907e406d129 100644
--- a/arch/arm/mach-tegra/sleep.h
+++ b/arch/arm/mach-tegra/sleep.h
@@ -41,6 +41,10 @@
#define CPU_NOT_RESETTABLE 0
#endif
+/* flag of tegra_disable_clean_inv_dcache to do LoUIS or all */
+#define TEGRA_FLUSH_CACHE_LOUIS 0
+#define TEGRA_FLUSH_CACHE_ALL 1
+
#ifdef __ASSEMBLY__
/* returns the offset of the flow controller halt register for a cpu */
.macro cpu_to_halt_reg rd, rcpu
@@ -144,7 +148,7 @@ void tegra_pen_lock(void);
void tegra_pen_unlock(void);
void tegra_resume(void);
int tegra_sleep_cpu_finish(unsigned long);
-void tegra_disable_clean_inv_dcache(void);
+void tegra_disable_clean_inv_dcache(u32 flag);
#ifdef CONFIG_HOTPLUG_CPU
void tegra20_hotplug_shutdown(void);