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authorTuomas Tynkkynen <ttynkkynen@nvidia.com>2015-05-13 16:58:38 +0200
committerThierry Reding <treding@nvidia.com>2015-07-16 09:32:47 +0200
commitfa63aa3dea48fd18e560c232424e080a2e2c4779 (patch)
tree72b4ad634ca6faf533d87c6535cd5e7f7874c936 /arch/arm/mach-tegra
parentclk: tegra: Add closed loop support for the DFLL (diff)
downloadlinux-fa63aa3dea48fd18e560c232424e080a2e2c4779.tar.xz
linux-fa63aa3dea48fd18e560c232424e080a2e2c4779.zip
clk: tegra: Add functions for parsing CVB tables
Tegra CVB tables encode the relationship between operating voltage and optimal frequency as a function of the so-called speedo value. The speedo value is written to the on-chip fuses at the factory, which allows the voltage-frequency operating points to be calculated on an per-chip basis. Add utility functions to parse the Tegra-specific tables and export the voltage-frequency pairs to the generic OPP framework for other drivers to use. Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com> Signed-off-by: Mikko Perttunen <mikko.perttunen@kapsi.fi> Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Michael Turquette <mturquette@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra')
-rw-r--r--arch/arm/mach-tegra/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 5d1a318f1302..0fa4c5f8b1be 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -8,6 +8,7 @@ menuconfig ARCH_TEGRA
select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD if SMP
select PINCTRL
+ select PM_OPP
select ARCH_HAS_RESET_CONTROLLER
select RESET_CONTROLLER
select SOC_BUS