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authorLinus Walleij <linus.walleij@linaro.org>2011-03-24 16:13:13 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-05-26 11:33:35 +0200
commit729303191ef4bd5df4c5e9ffca62268758928b2c (patch)
treee2410d5b07b33efc5f03c3759d09f89660c4bb05 /arch/arm/mach-ux500/board-mop500-sdi.c
parentARM: 6829/1: amba: make hardcoded periphid override hardware (diff)
downloadlinux-729303191ef4bd5df4c5e9ffca62268758928b2c.tar.xz
linux-729303191ef4bd5df4c5e9ffca62268758928b2c.zip
ARM: 6830/1: mach-ux500: force PrimeCell revisions
The DB8500v2 and DB5500 has a fifth version of the "PL023" and PL180 blocks. However the ASIC engineers have forgot to bump the revision in the PrimeCell peripheral ID registers. Since the platform is aware of the actual silicon revision we need to hard-code the periphid from the platform, bumping the subrevision field to 1. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-ux500/board-mop500-sdi.c')
-rw-r--r--arch/arm/mach-ux500/board-mop500-sdi.c16
1 files changed, 12 insertions, 4 deletions
diff --git a/arch/arm/mach-ux500/board-mop500-sdi.c b/arch/arm/mach-ux500/board-mop500-sdi.c
index bf0b02414e5b..7c6cb4fa47a9 100644
--- a/arch/arm/mach-ux500/board-mop500-sdi.c
+++ b/arch/arm/mach-ux500/board-mop500-sdi.c
@@ -99,8 +99,11 @@ static void sdi0_configure(void)
gpio_direction_output(sdi0_vsel, 0);
gpio_direction_output(sdi0_en, 1);
- /* Add the device */
- db8500_add_sdi0(&mop500_sdi0_data);
+ /* Add the device, force v2 to subrevision 1 */
+ if (cpu_is_u8500v2())
+ db8500_add_sdi0(&mop500_sdi0_data, 0x10480180);
+ else
+ db8500_add_sdi0(&mop500_sdi0_data, 0);
}
void mop500_sdi_tc35892_init(void)
@@ -188,13 +191,18 @@ static struct mmci_platform_data mop500_sdi4_data = {
void __init mop500_sdi_init(void)
{
+ u32 periphid = 0;
+
+ /* v2 has a new version of this block that need to be forced */
+ if (cpu_is_u8500v2())
+ periphid = 0x10480180;
/* PoP:ed eMMC on top of DB8500 v1.0 has problems with high speed */
if (!cpu_is_u8500v10())
mop500_sdi2_data.capabilities |= MMC_CAP_MMC_HIGHSPEED;
- db8500_add_sdi2(&mop500_sdi2_data);
+ db8500_add_sdi2(&mop500_sdi2_data, periphid);
/* On-board eMMC */
- db8500_add_sdi4(&mop500_sdi4_data);
+ db8500_add_sdi4(&mop500_sdi4_data, periphid);
if (machine_is_hrefv60()) {
mop500_sdi0_data.gpio_cd = HREFV60_SDMMC_CD_GPIO;