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| author | Linus Walleij <linus.walleij@linaro.org> | 2012-01-23 11:54:44 +0100 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2012-05-02 00:25:13 +0200 |
| commit | bc71c0961c61d6082472203bfae9596899c9c896 (patch) | |
| tree | 8a29af932f2acdb8249b1aedb12f7d48d14cf51b /arch/arm/mach-ux500/cache-l2x0.c | |
| parent | Linux 3.4-rc4 (diff) | |
| download | linux-bc71c0961c61d6082472203bfae9596899c9c896.tar.xz linux-bc71c0961c61d6082472203bfae9596899c9c896.zip | |
ARM: ux500: core U9540 support
This adds support for the U9540 variant of the U8500 series. This
is an application processor without internal modem. This is the
most basic part with ASIC ID, CPU-related fixes, IRQ list, register
ranges, timer, UART, and L2 cache setup. This is based on a patch
by Michel Jaouen which was rewritten to fit with the latest 3.3
kernel.
ChangeLog v1->v2: deleted the irqs-db9540.h file since we expect to
migrate to using Device Tree for getting the IRQs to devices.
ChangeLog v2->v3: introduced a fixed virtual offset for the ROM
as suggested by Arnd Bergmann.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Sebastien Pasdeloup <sebastien.pasdeloup-nonst@stericsson.com>
Signed-off-by: Michel Jaouen <michel.jaouen@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/mach-ux500/cache-l2x0.c')
| -rw-r--r-- | arch/arm/mach-ux500/cache-l2x0.c | 16 |
1 files changed, 13 insertions, 3 deletions
diff --git a/arch/arm/mach-ux500/cache-l2x0.c b/arch/arm/mach-ux500/cache-l2x0.c index 77a75ed0df67..677bb7683c71 100644 --- a/arch/arm/mach-ux500/cache-l2x0.c +++ b/arch/arm/mach-ux500/cache-l2x0.c @@ -36,9 +36,11 @@ static int __init ux500_l2x0_unlock(void) static int __init ux500_l2x0_init(void) { + u32 aux_val = 0x3e000000; + if (cpu_is_u5500()) l2x0_base = __io_address(U5500_L2CC_BASE); - else if (cpu_is_u8500()) + else if (cpu_is_u8500_family()) l2x0_base = __io_address(U8500_L2CC_BASE); else ux500_unknown_soc(); @@ -46,11 +48,19 @@ static int __init ux500_l2x0_init(void) /* Unlock before init */ ux500_l2x0_unlock(); + /* DB9540's L2 has 128KB way size */ + if (cpu_is_u9540()) + /* 128KB way size */ + aux_val |= (0x4 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT); + else + /* 64KB way size */ + aux_val |= (0x3 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT); + /* 64KB way size, 8 way associativity, force WA */ if (of_have_populated_dt()) - l2x0_of_init(0x3e060000, 0xc0000fff); + l2x0_of_init(aux_val, 0xc0000fff); else - l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff); + l2x0_init(l2x0_base, aux_val, 0xc0000fff); /* * We can't disable l2 as we are in non secure mode, currently |