summaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-ux500/cpu-db8500.c
diff options
context:
space:
mode:
authorLinus Walleij <linus.walleij@linaro.org>2011-12-14 18:15:42 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-12-19 00:02:56 +0100
commit215e83d971a04f04d191c7f702943412a19408fd (patch)
tree4e8d9ca52ce48e2fe0ecd3626809351f4415a9ec /arch/arm/mach-ux500/cpu-db8500.c
parentARM: 7205/2: sched_clock: allow sched_clock to be selected at runtime (diff)
downloadlinux-215e83d971a04f04d191c7f702943412a19408fd.tar.xz
linux-215e83d971a04f04d191c7f702943412a19408fd.zip
ARM: 7233/1: ux500: remove overlapping iotable entries
The overlapping iotable mapping entries for the ux500 Cortex A9 SCU, CPU control and TWD are no longer accepted by the kernel. Remove the overlaps so the machine boots again. Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Rabin Vincent <rabin.vincent@stericsson.com> Reported-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-ux500/cpu-db8500.c')
-rw-r--r--arch/arm/mach-ux500/cpu-db8500.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index 13e8890a8b8a..7f2729c05db3 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -35,12 +35,11 @@ static struct map_desc u8500_uart_io_desc[] __initdata = {
};
static struct map_desc u8500_io_desc[] __initdata = {
- __IO_DEV_DESC(U8500_GIC_CPU_BASE, SZ_4K),
+ /* SCU base also covers GIC CPU BASE and TWD with its 4K page */
+ __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),
__IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K),
__IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K),
- __IO_DEV_DESC(U8500_TWD_BASE, SZ_4K),
__IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K),
- __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),
__IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K),
__IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K),