Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform updates from Arnd Bergmann:
 "In the SoC branch we normally collect classic arch/arm/mach-*
  contents, i.e. C code changes for SoC platforms. This release cycle
  the diffstat is quite nice, in that we're removing 3x the amount of
  code that's being added.

  The main reason for this is that there's a removal of camera drivers
  for Freescale i.MX chips (driver was removed so the device
  registration isn't needed any more). There's also removal of display
  initialization code for OMAP that is no longer needed.

  The rest are mostly minor tweaks and cleanups; constification on
  Samsung platforms, cleanup of ux500 platform data, purge of other
  unused platform data/device seutp on i.MX and other good stuff.

  New SoC support this cycle is for two Allwinner platforms, H2+ and
  V3s"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (55 commits)
  ARM: ux500: remove deleted file from Makefile
  ARM: ep93xx: Disable TS-72xx watchdog before uncompressing
  ARM: ux500: cut some platform data
  MAINTAINERS: Update for the current location of the bcm2835 tree.
  ARM: davinci: remove BUG_ON() from da850_register_sata()
  ARM: davinci: da850: model the SATA refclk
  ARM: davinci: da850: add con_id for the SATA clock
  ARM: davinci: da8xx-dt: add OF_DEV_AUXDATA entry for SATA
  arm: mvebu: support for SMP on 98DX3336 SoC
  dt-bindings: video: exynos7-decon: Remove obsolete samsung,power-domain property
  soc: dove: constify reset_control_ops structures
  ARM: mv78xx0: fix possible PCI buffer overflow
  MAINTAINERS: transfer maintainership for the EZX platform
  ARM: shmobile: rcar-gen2: Add more register documentation
  ARM: tegra: paz00: Fix __initdata placement
  ARM: OMAP: clock: Remove unused mpurate cmdline option
  ARM: davinci: add skeleton for pdata-quirks
  arm: sunxi: add support for V3s SoC
  ARM: OMAP2+: omap_hwmod: Add support for earlycon
  arm: hisi: drop extern hip01_cpu_die
  ...

1 files changed, 19 insertions, 26 deletions

diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c
index 8f2f615ff958..e0ee139fdebf 100644
--- a/arch/arm/mach-ux500/platsmp.c
+++ b/arch/arm/mach-ux500/platsmp.c
@@ -31,10 +31,14 @@
 #define UX500_CPU1_JUMPADDR_OFFSET 0x1FF4
 #define UX500_CPU1_WAKEMAGIC_OFFSET 0x1FF0
 
-static void wakeup_secondary(void)
+static void __iomem *backupram;
+
+static void __init ux500_smp_prepare_cpus(unsigned int max_cpus)
 {
 	struct device_node *np;
-	static void __iomem *backupram;
+	static void __iomem *scu_base;
+	unsigned int ncores;
+	int i;
 
 	np = of_find_compatible_node(NULL, NULL, "ste,dbx500-backupram");
 	if (!np) {
@@ -48,29 +52,6 @@ static void wakeup_secondary(void)
 		return;
 	}
 
-	/*
-	 * write the address of secondary startup into the backup ram register
-	 * at offset 0x1FF4, then write the magic number 0xA1FEED01 to the
-	 * backup ram register at offset 0x1FF0, which is what boot rom code
-	 * is waiting for. This will wake up the secondary core from WFE.
-	 */
-	writel(virt_to_phys(secondary_startup),
-	       backupram + UX500_CPU1_JUMPADDR_OFFSET);
-	writel(0xA1FEED01,
-	       backupram + UX500_CPU1_WAKEMAGIC_OFFSET);
-
-	/* make sure write buffer is drained */
-	mb();
-	iounmap(backupram);
-}
-
-static void __init ux500_smp_prepare_cpus(unsigned int max_cpus)
-{
-	struct device_node *np;
-	static void __iomem *scu_base;
-	unsigned int ncores;
-	int i;
-
 	np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu");
 	if (!np) {
 		pr_err("No SCU base address\n");
@@ -92,7 +73,19 @@ static void __init ux500_smp_prepare_cpus(unsigned int max_cpus)
 
 static int ux500_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
-	wakeup_secondary();
+	/*
+	 * write the address of secondary startup into the backup ram register
+	 * at offset 0x1FF4, then write the magic number 0xA1FEED01 to the
+	 * backup ram register at offset 0x1FF0, which is what boot rom code
+	 * is waiting for. This will wake up the secondary core from WFE.
+	 */
+	writel(virt_to_phys(secondary_startup),
+	       backupram + UX500_CPU1_JUMPADDR_OFFSET);
+	writel(0xA1FEED01,
+	       backupram + UX500_CPU1_WAKEMAGIC_OFFSET);
+
+	/* make sure write buffer is drained */
+	mb();
 	arch_send_wakeup_ipi_mask(cpumask_of(cpu));
 	return 0;
 }