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| author | Mattias Wallin <mattias.wallin@stericsson.com> | 2010-12-02 16:20:42 +0100 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@stericsson.com> | 2010-12-08 13:14:13 +0100 |
| commit | fcbd458e95316fe5031f1b8eaf5e66ce8f3c3146 (patch) | |
| tree | 504699aded7b00e11de6019af68381fcdf0beecf /arch/arm/mach-ux500/prcmu.c | |
| parent | ux500: rework device registration (diff) | |
| download | linux-fcbd458e95316fe5031f1b8eaf5e66ce8f3c3146.tar.xz linux-fcbd458e95316fe5031f1b8eaf5e66ce8f3c3146.zip | |
ARM: ux500: prcmu db8500 v2 support
This patch adds support for db8500 chip version 2.
The TCDM memory address of the PRCMU is changed and
dynamic detection of that is added.
Signed-off-by: Mattias Wallin <mattias.wallin@stericsson.com>
Acked-by: Linus Walleij <linus.walleij@stericsson.com>
Diffstat (limited to '')
| -rw-r--r-- | arch/arm/mach-ux500/prcmu.c | 25 |
1 files changed, 20 insertions, 5 deletions
diff --git a/arch/arm/mach-ux500/prcmu.c b/arch/arm/mach-ux500/prcmu.c index 293274d1342a..3ba3e3298b89 100644 --- a/arch/arm/mach-ux500/prcmu.c +++ b/arch/arm/mach-ux500/prcmu.c @@ -20,10 +20,11 @@ #include <mach/hardware.h> #include <mach/prcmu-regs.h> -#define PRCMU_TCDM_BASE __io_address(U8500_PRCMU_TCDM_BASE) +/* Global var to runtime determine TCDM base for v2 or v1 */ +static __iomem void *tcdm_base; -#define REQ_MB5 (PRCMU_TCDM_BASE + 0xE44) -#define ACK_MB5 (PRCMU_TCDM_BASE + 0xDF4) +#define REQ_MB5 (tcdm_base + 0xE44) +#define ACK_MB5 (tcdm_base + 0xDF4) #define REQ_MB5_I2C_SLAVE_OP (REQ_MB5) #define REQ_MB5_I2C_HW_BITS (REQ_MB5 + 1) @@ -33,8 +34,10 @@ #define ACK_MB5_I2C_STATUS (ACK_MB5 + 1) #define ACK_MB5_I2C_VAL (ACK_MB5 + 3) -#define I2C_WRITE(slave) ((slave) << 1) -#define I2C_READ(slave) (((slave) << 1) | BIT(0)) +#define I2C_WRITE(slave) \ + (((slave) << 1) | (cpu_is_u8500v2() ? BIT(6) : 0)) +#define I2C_READ(slave) \ + (((slave) << 1) | (cpu_is_u8500v2() ? BIT(6) : 0) | BIT(0)) #define I2C_STOP_EN BIT(3) enum ack_mb5_status { @@ -217,6 +220,18 @@ static irqreturn_t prcmu_irq_handler(int irq, void *data) return IRQ_HANDLED; } +void __init prcmu_early_init(void) +{ + if (cpu_is_u8500v11() || cpu_is_u8500ed()) { + tcdm_base = __io_address(U8500_PRCMU_TCDM_BASE_V1); + } else if (cpu_is_u8500v2()) { + tcdm_base = __io_address(U8500_PRCMU_TCDM_BASE); + } else { + pr_err("prcmu: Unsupported chip version\n"); + BUG(); + } +} + static int __init prcmu_init(void) { mutex_init(&mb5_transfer.lock); |