diff options
| author | Will Deacon <will.deacon@arm.com> | 2011-02-28 17:01:04 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-03-20 10:32:21 +0100 |
| commit | 80b5efbd43f0a21e9fc6db87823be32fcfe3e7ce (patch) | |
| tree | 12a213968fa7c0bac41ff539f82ba64f0e979c4c /arch/arm/mach-vexpress/ct-ca9x4.c | |
| parent | Merge branches 'fixes', 'pgt-next' and 'versatile' into devel (diff) | |
| download | linux-80b5efbd43f0a21e9fc6db87823be32fcfe3e7ce.tar.xz linux-80b5efbd43f0a21e9fc6db87823be32fcfe3e7ce.zip | |
ARM: 6771/1: vexpress: add support for multiple core tiles
The current Versatile Express BSP defines the MACHINE_START macro
in the core tile code.
This patch moves this into the generic board code and introduces a
method for determining the current tile at runtime, allowing the
Kernel to have support for multiple tiles compiled in. Tile-specific
functions are executed via a descriptor struct containing the correct
implementations for the current tile.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-vexpress/ct-ca9x4.c')
| -rw-r--r-- | arch/arm/mach-vexpress/ct-ca9x4.c | 45 |
1 files changed, 30 insertions, 15 deletions
diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c index 30d5a5b0ac21..ebc22e759325 100644 --- a/arch/arm/mach-vexpress/ct-ca9x4.c +++ b/arch/arm/mach-vexpress/ct-ca9x4.c @@ -10,19 +10,17 @@ #include <linux/amba/clcd.h> #include <linux/clkdev.h> -#include <asm/pgtable.h> #include <asm/hardware/arm_timer.h> #include <asm/hardware/cache-l2x0.h> #include <asm/hardware/gic.h> -#include <asm/mach-types.h> #include <asm/pmu.h> +#include <asm/smp_scu.h> #include <asm/smp_twd.h> #include <mach/ct-ca9x4.h> #include <asm/hardware/timer-sp.h> -#include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/mach/time.h> @@ -58,7 +56,7 @@ static void __init ct_ca9x4_map_io(void) #ifdef CONFIG_LOCAL_TIMERS twd_base = MMIO_P2V(A9_MPCORE_TWD); #endif - v2m_map_io(ct_ca9x4_io_desc, ARRAY_SIZE(ct_ca9x4_io_desc)); + iotable_init(ct_ca9x4_io_desc, ARRAY_SIZE(ct_ca9x4_io_desc)); } static void __init ct_ca9x4_init_irq(void) @@ -183,8 +181,6 @@ static struct platform_device pmu_device = { static void __init ct_ca9x4_init_early(void) { clkdev_add_table(lookups, ARRAY_SIZE(lookups)); - - v2m_init_early(); } static void __init ct_ca9x4_init(void) @@ -207,15 +203,34 @@ static void __init ct_ca9x4_init(void) platform_device_register(&pmu_device); } -MACHINE_START(VEXPRESS, "ARM-Versatile Express CA9x4") - .boot_params = PLAT_PHYS_OFFSET + 0x00000100, +#ifdef CONFIG_SMP +static void ct_ca9x4_init_cpu_map(void) +{ + int i, ncores = scu_get_core_count(MMIO_P2V(A9_MPCORE_SCU)); + + for (i = 0; i < ncores; ++i) + set_cpu_possible(i, true); +} + +static void ct_ca9x4_smp_enable(unsigned int max_cpus) +{ + int i; + for (i = 0; i < max_cpus; i++) + set_cpu_present(i, true); + + scu_enable(MMIO_P2V(A9_MPCORE_SCU)); +} +#endif + +struct ct_desc ct_ca9x4_desc __initdata = { + .id = V2M_CT_ID_CA9, + .name = "CA9x4", .map_io = ct_ca9x4_map_io, - .init_irq = ct_ca9x4_init_irq, .init_early = ct_ca9x4_init_early, -#if 0 - .timer = &ct_ca9x4_timer, -#else - .timer = &v2m_timer, + .init_irq = ct_ca9x4_init_irq, + .init_tile = ct_ca9x4_init, +#ifdef CONFIG_SMP + .init_cpu_map = ct_ca9x4_init_cpu_map, + .smp_enable = ct_ca9x4_smp_enable, #endif - .init_machine = ct_ca9x4_init, -MACHINE_END +}; |