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| author | Nicolas Pitre <nicolas.pitre@linaro.org> | 2014-03-24 16:51:58 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-04-07 16:27:05 +0200 |
| commit | c9d347e0277696c80496161cbef47393b850a0aa (patch) | |
| tree | b7fe1b735170ae1760dc2f551bc24640120ec3d0 /arch/arm/mach-vexpress/dcscb.c | |
| parent | ARM: 8014/1: mm: fix reporting of read-only PMD bits (diff) | |
| download | linux-c9d347e0277696c80496161cbef47393b850a0aa.tar.xz linux-c9d347e0277696c80496161cbef47393b850a0aa.zip | |
ARM: 8009/1: dcscb.c: remove call to outer_flush_all()
Strictly speaking this call is a no-op on the platform where dcscb.c is
used since it only has architected caches. The call was there as a hint
to people inspired by this code when writing their own backend, but the
hint might not always be correct.
For example, if a PL310 were to be used it wouldn't be safe to call
the regular outer_flush_all() as atomic instructions for locking
are involved in that case and those instructions cannot be assumed to
still be operational after v7_exit_coherency_flush() has returned.
Given no other CPUs (in the cluster) should be running at that point
then standard concurrency concerns wouldn't apply.
So let's simply kill this call for now and enhance the existing comment.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-vexpress/dcscb.c')
| -rw-r--r-- | arch/arm/mach-vexpress/dcscb.c | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/arch/arm/mach-vexpress/dcscb.c b/arch/arm/mach-vexpress/dcscb.c index 14d499688736..788495d35cf9 100644 --- a/arch/arm/mach-vexpress/dcscb.c +++ b/arch/arm/mach-vexpress/dcscb.c @@ -137,11 +137,16 @@ static void dcscb_power_down(void) v7_exit_coherency_flush(all); /* - * This is a harmless no-op. On platforms with a real - * outer cache this might either be needed or not, - * depending on where the outer cache sits. + * A full outer cache flush could be needed at this point + * on platforms with such a cache, depending on where the + * outer cache sits. In some cases the notion of a "last + * cluster standing" would need to be implemented if the + * outer cache is shared across clusters. In any case, when + * the outer cache needs flushing, there is no concurrent + * access to the cache controller to worry about and no + * special locking besides what is already provided by the + * MCPM state machinery is needed. */ - outer_flush_all(); /* * Disable cluster-level coherency by masking |