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author | Pawel Moll <pawel.moll@arm.com> | 2012-06-12 17:14:03 +0200 |
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committer | Pawel Moll <pawel.moll@arm.com> | 2012-07-12 17:16:56 +0200 |
commit | d927daf5c81c9b6bf2d6a83dc4c8c60268930ee5 (patch) | |
tree | e0a45cf8833d54d2b811b1b5a9635b3b8c844084 /arch/arm/mach-vexpress/include | |
parent | ARM: vexpress: remove automatic errata workaround selection (diff) | |
download | linux-d927daf5c81c9b6bf2d6a83dc4c8c60268930ee5.tar.xz linux-d927daf5c81c9b6bf2d6a83dc4c8c60268930ee5.zip |
ARM: vexpress: Check master site in daughterboard's sysctl operations
With recent enough motherboard firmware, core tile can be fitted
in either of the two daughterboard sites. The non-DT tile code for
V2P-CA9 did not check that when configuring DVI output nor setting
CLCD pixel clock.
Fixed now, providing "get master site" API in motherboard's code.
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Diffstat (limited to 'arch/arm/mach-vexpress/include')
-rw-r--r-- | arch/arm/mach-vexpress/include/mach/motherboard.h | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/arm/mach-vexpress/include/mach/motherboard.h b/arch/arm/mach-vexpress/include/mach/motherboard.h index 31a92890893d..f004ec982d29 100644 --- a/arch/arm/mach-vexpress/include/mach/motherboard.h +++ b/arch/arm/mach-vexpress/include/mach/motherboard.h @@ -104,9 +104,10 @@ #define SYS_CFG_REBOOT (9 << 20) #define SYS_CFG_DVIMODE (11 << 20) #define SYS_CFG_POWER (12 << 20) -#define SYS_CFG_SITE_MB (0 << 16) -#define SYS_CFG_SITE_DB1 (1 << 16) -#define SYS_CFG_SITE_DB2 (2 << 16) +#define SYS_CFG_SITE(n) ((n) << 16) +#define SYS_CFG_SITE_MB 0 +#define SYS_CFG_SITE_DB1 1 +#define SYS_CFG_SITE_DB2 2 #define SYS_CFG_STACK(n) ((n) << 12) #define SYS_CFG_ERR (1 << 1) @@ -122,6 +123,8 @@ void v2m_flags_set(u32 data); #define SYS_MISC_MASTERSITE (1 << 14) #define SYS_PROCIDx_HBI_MASK 0xfff +int v2m_get_master_site(void); + /* * Core tile IDs */ |