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| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-12-04 17:01:03 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-12-14 20:21:40 +0100 |
| commit | 384895330e0f3954d9478fd0853145f9c169df12 (patch) | |
| tree | c90f70f4e070b640a1f1f2a76cf4acf864354093 /arch/arm/mach-vexpress | |
| parent | ARM: GIC: provide a single initialization function for boot CPU (diff) | |
| download | linux-384895330e0f3954d9478fd0853145f9c169df12.tar.xz linux-384895330e0f3954d9478fd0853145f9c169df12.zip | |
ARM: GIC: Remove MMIO address from gic_cpu_init, rename to gic_secondary_init
We don't need to re-pass the base address for the CPU interfaces to the
GIC for secondary CPUs, as it will never be different from the boot CPU
- and even if it was, we'd overwrite the boot CPU's base address.
Get rid of this argument, and rename to gic_secondary_init().
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-vexpress')
| -rw-r--r-- | arch/arm/mach-vexpress/platsmp.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-vexpress/platsmp.c b/arch/arm/mach-vexpress/platsmp.c index 670970699ba9..dfb591031d17 100644 --- a/arch/arm/mach-vexpress/platsmp.c +++ b/arch/arm/mach-vexpress/platsmp.c @@ -51,7 +51,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu) * core (e.g. timer irq), then they will not have been enabled * for us: do so */ - gic_cpu_init(0, gic_cpu_base_addr); + gic_secondary_init(0); /* * let the primary processor know we're out of the |