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author | Soren Brinkmann <soren.brinkmann@xilinx.com> | 2014-09-02 23:19:09 +0200 |
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committer | Michal Simek <michal.simek@xilinx.com> | 2014-09-16 12:55:07 +0200 |
commit | 0beb2bd36f6216f455363f47f8ba32fdf26667fb (patch) | |
tree | fb371f2b3d8c5e23b81cd714d697042227c3dc6b /arch/arm/mach-zynq/common.c | |
parent | ARM: zynq: DT: Add DDRC node (diff) | |
download | linux-0beb2bd36f6216f455363f47f8ba32fdf26667fb.tar.xz linux-0beb2bd36f6216f455363f47f8ba32fdf26667fb.zip |
ARM: zynq: PM: Enable DDR clock stop
The DDR controller can detect idle periods and leverage low power
features clock stop. When new requests occur, the DDRC resumes
normal operation.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/mach-zynq/common.c')
-rw-r--r-- | arch/arm/mach-zynq/common.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c index 3cb7c198615a..6bd13e5ce6b7 100644 --- a/arch/arm/mach-zynq/common.c +++ b/arch/arm/mach-zynq/common.c @@ -101,6 +101,7 @@ static int __init zynq_get_revision(void) static void __init zynq_init_late(void) { zynq_core_pm_init(); + zynq_pm_late_init(); } /** |