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| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-06-24 20:43:15 +0200 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-07-18 13:29:02 +0200 |
| commit | af040ffc9ba1e079ee4c0748aff64fa3d4716fa5 (patch) | |
| tree | 03d58af8c3d16a777ee93e35d9f7aef15293a163 /arch/arm/mm/cache-l2x0.c | |
| parent | ARM: 8099/1: EXYNOS: Fix MCPM build with SUSPEND=n (diff) | |
| download | linux-af040ffc9ba1e079ee4c0748aff64fa3d4716fa5.tar.xz linux-af040ffc9ba1e079ee4c0748aff64fa3d4716fa5.zip | |
ARM: make it easier to check the CPU part number correctly
Ensure that platform maintainers check the CPU part number in the right
manner: the CPU part number is meaningless without also checking the
CPU implement(e|o)r (choose your preferred spelling!) Provide an
interface which returns both the implementer and part number together,
and update the definitions to include the implementer.
Mark the old function as being deprecated... indeed, using the old
function with the definitions will now always evaluate as false, so
people must update their un-merged code to the new function. While
this could be avoided by adding new definitions, we'd also have to
create new names for them which would be awkward.
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/cache-l2x0.c')
| -rw-r--r-- | arch/arm/mm/cache-l2x0.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index 076172b69422..556df22e89bd 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c @@ -665,7 +665,7 @@ static int l2c310_cpu_enable_flz(struct notifier_block *nb, unsigned long act, v static void __init l2c310_enable(void __iomem *base, u32 aux, unsigned num_lock) { unsigned rev = readl_relaxed(base + L2X0_CACHE_ID) & L2X0_CACHE_ID_PART_MASK; - bool cortex_a9 = read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9; + bool cortex_a9 = read_cpuid_part() == ARM_CPU_PART_CORTEX_A9; if (rev >= L310_CACHE_ID_RTL_R2P0) { if (cortex_a9) { |