diff options
| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-07-07 14:53:03 +0200 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-07-07 18:55:22 +0200 |
| commit | 9a2c33a422d60e8e55c5aff6752522dc39993b16 (patch) | |
| tree | 4938bf93369d33816248981f025431cf47ce473b /arch/arm/mm/cache-l2x0.c | |
| parent | ARM: 8087/1: ptrace: reload syscall number after secure_computing() check (diff) | |
| download | linux-9a2c33a422d60e8e55c5aff6752522dc39993b16.tar.xz linux-9a2c33a422d60e8e55c5aff6752522dc39993b16.zip | |
ARM: l2c: fix revision checking
The revision checking in l2c310_enable() was not correct; we were
masking the part number rather than the revision number. Fix this
to use the correct macro.
Fixes: 4374d64933b1 ("ARM: l2c: add automatic enable of early BRESP")
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/cache-l2x0.c')
| -rw-r--r-- | arch/arm/mm/cache-l2x0.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index 076172b69422..7c3fb41a462e 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c @@ -664,7 +664,7 @@ static int l2c310_cpu_enable_flz(struct notifier_block *nb, unsigned long act, v static void __init l2c310_enable(void __iomem *base, u32 aux, unsigned num_lock) { - unsigned rev = readl_relaxed(base + L2X0_CACHE_ID) & L2X0_CACHE_ID_PART_MASK; + unsigned rev = readl_relaxed(base + L2X0_CACHE_ID) & L2X0_CACHE_ID_RTL_MASK; bool cortex_a9 = read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9; if (rev >= L310_CACHE_ID_RTL_R2P0) { |