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authorRussell King <rmk+kernel@arm.linux.org.uk>2014-03-15 17:48:18 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2014-05-30 01:48:17 +0200
commit99ca1772e52d8825172100a24e461a0ffe11e125 (patch)
tree7c092ae26cc3f96fc5e5a5a15bc192fbbac44a38 /arch/arm/mm/cache-l2x0.c
parentARM: l2c: add L2C-210 specific handlers (diff)
downloadlinux-99ca1772e52d8825172100a24e461a0ffe11e125.tar.xz
linux-99ca1772e52d8825172100a24e461a0ffe11e125.zip
ARM: l2c: implement L2C-310 erratum 727915 as a method override
Implement L2C-310 erratum 727915 by overriding the flush_all method in the outer_cache operations structure. This allows us to sensibly contain the erratum code in one place without affecting other locations or implementations. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/cache-l2x0.c')
-rw-r--r--arch/arm/mm/cache-l2x0.c20
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index d07fa4fc95a3..6161232c8a85 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -522,6 +522,19 @@ static void l2c310_set_debug(unsigned long val)
writel_relaxed(val, l2x0_base + L2X0_DEBUG_CTRL);
}
+static void l2c310_flush_all_erratum(void)
+{
+ void __iomem *base = l2x0_base;
+ unsigned long flags;
+
+ raw_spin_lock_irqsave(&l2x0_lock, flags);
+ l2c_set_debug(base, 0x03);
+ __l2c_op_way(base + L2X0_CLEAN_INV_WAY);
+ l2c_set_debug(base, 0x00);
+ __l2c210_cache_sync(base);
+ raw_spin_unlock_irqrestore(&l2x0_lock, flags);
+}
+
static void __init l2c310_save(void __iomem *base)
{
unsigned revision;
@@ -590,6 +603,13 @@ static void __init l2c310_fixup(void __iomem *base, u32 cache_id,
if (revision <= L310_CACHE_ID_RTL_R3P0)
fns->set_debug = l2c310_set_debug;
+ if (IS_ENABLED(CONFIG_PL310_ERRATA_727915) &&
+ revision >= L310_CACHE_ID_RTL_R2P0 &&
+ revision < L310_CACHE_ID_RTL_R3P1) {
+ fns->flush_all = l2c310_flush_all_erratum;
+ errata[n++] = "727915";
+ }
+
if (IS_ENABLED(CONFIG_PL310_ERRATA_753970) &&
revision == L310_CACHE_ID_RTL_R3P0) {
sync_reg_offset = L2X0_DUMMY_REG;