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authorRussell King <rmk+kernel@arm.linux.org.uk>2012-05-21 16:15:24 +0200
committerRussell King <rmk+kernel@arm.linux.org.uk>2012-05-21 16:15:24 +0200
commit4175160b065e74572819a320dcd34129224a4e1c (patch)
tree3298e2c9a7c7db33bf28617875e5429e17eec61c /arch/arm/mm/cache-v4wb.S
parentMerge branches 'amba', 'devel-stable', 'fixes', 'mach-types', 'mmci', 'pci' a... (diff)
parentARM: 7416/1: LPAE: Remove unused L_PTE_(BUFFERABLE|CACHEABLE) macros (diff)
downloadlinux-4175160b065e74572819a320dcd34129224a4e1c.tar.xz
linux-4175160b065e74572819a320dcd34129224a4e1c.zip
Merge branch 'misc' into for-linus
Conflicts: arch/arm/kernel/ptrace.c
Diffstat (limited to 'arch/arm/mm/cache-v4wb.S')
-rw-r--r--arch/arm/mm/cache-v4wb.S6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mm/cache-v4wb.S b/arch/arm/mm/cache-v4wb.S
index 4f2c14151ccb..8f1eeae340c8 100644
--- a/arch/arm/mm/cache-v4wb.S
+++ b/arch/arm/mm/cache-v4wb.S
@@ -167,9 +167,9 @@ ENTRY(v4wb_coherent_user_range)
add r0, r0, #CACHE_DLINESIZE
cmp r0, r1
blo 1b
- mov ip, #0
- mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache
- mcr p15, 0, ip, c7, c10, 4 @ drain WB
+ mov r0, #0
+ mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
+ mcr p15, 0, r0, c7, c10, 4 @ drain WB
mov pc, lr