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| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2015-04-03 12:21:42 +0200 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2015-04-14 23:26:52 +0200 |
| commit | cd8b24d9e852b53e68c69a086358c81423dfb8d1 (patch) | |
| tree | 9393ff2f7d6bd650f802ff5408b5facdc3b5bc86 /arch/arm/mm/cache-v4wt.S | |
| parent | ARM: cache-v7: shift CLIDR to extract appropriate field before masking (diff) | |
| download | linux-cd8b24d9e852b53e68c69a086358c81423dfb8d1.tar.xz linux-cd8b24d9e852b53e68c69a086358c81423dfb8d1.zip | |
ARM: cache-v7: consolidate initialisation of cache level index
Both v7_flush_cache_louis and v7_flush_dcache_all both begin the
flush_levels loop with r10 initialised to zero. In each case, this
is done immediately prior to entering the loop. Branch to this
instruction in v7_flush_dcache_all from v7_flush_cache_louis and
eliminate the unnecessary initialisation in v7_flush_cache_louis.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/cache-v4wt.S')
0 files changed, 0 insertions, 0 deletions