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authorRussell King <rmk+kernel@arm.linux.org.uk>2011-07-02 16:20:44 +0200
committerRussell King <rmk+kernel@arm.linux.org.uk>2012-01-26 21:06:28 +0100
commit67ece1443174d852e71c42facb3e2d7dd338c88a (patch)
tree418359d432acfcb2ecc4c58c8afa5f73de4fa01e /arch/arm/mm/copypage-xscale.c
parentARM: pgtable: use mk_pte rather than pfn_pte(page_to_pfn()) (diff)
downloadlinux-67ece1443174d852e71c42facb3e2d7dd338c88a.tar.xz
linux-67ece1443174d852e71c42facb3e2d7dd338c88a.zip
ARM: pgtable: consolidate set_pte_ext(TOP_PTE,...) + tlb flush
A number of places establish a PTE in our top page table and immediately flush the TLB. Rather than having this at every callsite, provide an inline function for this purpose. This changes some global tlb flushes to be local; each time we setup one of these mappings, we always do it with preemption disabled which would prevent us migrating to another CPU. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/copypage-xscale.c')
-rw-r--r--arch/arm/mm/copypage-xscale.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/arm/mm/copypage-xscale.c b/arch/arm/mm/copypage-xscale.c
index 2497dcf6d9ae..804eeddda97f 100644
--- a/arch/arm/mm/copypage-xscale.c
+++ b/arch/arm/mm/copypage-xscale.c
@@ -94,8 +94,7 @@ void xscale_mc_copy_user_highpage(struct page *to, struct page *from,
raw_spin_lock(&minicache_lock);
- set_pte_ext(TOP_PTE(COPYPAGE_MINICACHE), mk_pte(from, minicache_pgprot), 0);
- flush_tlb_kernel_page(COPYPAGE_MINICACHE);
+ set_top_pte(COPYPAGE_MINICACHE, mk_pte(from, minicache_pgprot));
mc_copy_user_page((void *)COPYPAGE_MINICACHE, kto);