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authorCatalin Marinas <catalin.marinas@arm.com>2011-11-22 18:30:28 +0100
committerCatalin Marinas <catalin.marinas@arm.com>2011-12-08 11:30:37 +0100
commit136848d4ca9cf6f08edf6e50cb9bbe19de55c32a (patch)
tree9b4b311b64f40afb2028db988710f3500e3995cf /arch/arm/mm/fault.h
parentARM: LPAE: Move page table maintenance macros to pgtable-2level.h (diff)
downloadlinux-136848d4ca9cf6f08edf6e50cb9bbe19de55c32a.tar.xz
linux-136848d4ca9cf6f08edf6e50cb9bbe19de55c32a.zip
ARM: LPAE: Move the FSR definitions to separate files
The FSR structure is different with LPAE and this patch moves the classic MMU specific definition to a separate fsr-2level.c file that is included in fault.c. It also moves the fsr_fs and FSR bits to the fault.h file. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm/mm/fault.h')
-rw-r--r--arch/arm/mm/fault.h19
1 files changed, 18 insertions, 1 deletions
diff --git a/arch/arm/mm/fault.h b/arch/arm/mm/fault.h
index 49e9e3804de4..25b45c105be2 100644
--- a/arch/arm/mm/fault.h
+++ b/arch/arm/mm/fault.h
@@ -1,3 +1,20 @@
-void do_bad_area(unsigned long addr, unsigned int fsr, struct pt_regs *regs);
+#ifndef __ARCH_ARM_FAULT_H
+#define __ARCH_ARM_FAULT_H
+
+/*
+ * Fault status register encodings. We steal bit 31 for our own purposes.
+ */
+#define FSR_LNX_PF (1 << 31)
+#define FSR_WRITE (1 << 11)
+#define FSR_FS4 (1 << 10)
+#define FSR_FS3_0 (15)
+
+static inline int fsr_fs(unsigned int fsr)
+{
+ return (fsr & FSR_FS3_0) | (fsr & FSR_FS4) >> 6;
+}
+void do_bad_area(unsigned long addr, unsigned int fsr, struct pt_regs *regs);
unsigned long search_exception_table(unsigned long addr);
+
+#endif /* __ARCH_ARM_FAULT_H */