diff options
| author | Marek Szyprowski <m.szyprowski@samsung.com> | 2019-05-28 10:38:14 +0200 |
|---|---|---|
| committer | Russell King <rmk+kernel@armlinux.org.uk> | 2019-06-20 23:29:58 +0200 |
| commit | 5f41f9198f296091c6a58bc2e86af1e9f019b2a3 (patch) | |
| tree | f309f6b56520b0b974c46cff4de32b3d8decc1c1 /arch/arm/mm/mm.h | |
| parent | ARM: 8861/1: errata: Workaround errata A12 857271 / A17 857272 (diff) | |
| download | linux-5f41f9198f296091c6a58bc2e86af1e9f019b2a3.tar.xz linux-5f41f9198f296091c6a58bc2e86af1e9f019b2a3.zip | |
ARM: 8864/1: Add workaround for I-Cache line size mismatch between CPU cores
Some big.LITTLE systems have I-Cache line size mismatch between
LITTLE and big cores. This patch adds a workaround for proper I-Cache
support on such systems. Without it, some class of the userspace code
(typically self-modifying) might suffer from random SIGILL failures.
Similar workaround already exists for ARM64 architecture. I has been
added by commit 116c81f427ff ("arm64: Work around systems with mismatched
cache line sizes").
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Diffstat (limited to 'arch/arm/mm/mm.h')
| -rw-r--r-- | arch/arm/mm/mm.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h index 6b045c6653ea..941356d95a67 100644 --- a/arch/arm/mm/mm.h +++ b/arch/arm/mm/mm.h @@ -8,6 +8,8 @@ /* the upper-most page table pointer */ extern pmd_t *top_pmd; +extern int icache_size; + /* * 0xffff8000 to 0xffffffff is reserved for any ARM architecture * specific hacks for copying pages efficiently, while 0xffff4000 |