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authorStefan Agner <stefan@agner.ch>2016-09-07 22:56:09 +0200
committerRussell King <rmk+kernel@armlinux.org.uk>2016-09-12 13:12:30 +0200
commit6b3142b2b852cd5e3216d1aa800a0a49377e6e1c (patch)
treed3a45c29f7c5be1a0d0d382c5a30acf999417b82 /arch/arm/mm/mmu.c
parentMerge branches 'fixes-pcmcia' and 'fixes-sa1111' into fixes (diff)
downloadlinux-6b3142b2b852cd5e3216d1aa800a0a49377e6e1c.tar.xz
linux-6b3142b2b852cd5e3216d1aa800a0a49377e6e1c.zip
ARM: 8612/1: LPAE: initialize cache policy correctly
The cachepolicy variable gets initialized using a masked pmd value. So far, the pmd has been masked with flags valid for the 2-page table format, but the 3-page table format requires a different mask. On LPAE, this lead to a wrong assumption of what initial cache policy has been used. Later a check forces the cache policy to writealloc and prints the following warning: Forcing write-allocate cache policy for SMP This patch introduces a new definition PMD_SECT_CACHE_MASK for both page table formats which masks in all cache flags in both cases. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/mmu.c')
-rw-r--r--arch/arm/mm/mmu.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 6344913f0804..30fe03f95c85 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -137,7 +137,7 @@ void __init init_default_cache_policy(unsigned long pmd)
initial_pmd_value = pmd;
- pmd &= PMD_SECT_TEX(1) | PMD_SECT_BUFFERABLE | PMD_SECT_CACHEABLE;
+ pmd &= PMD_SECT_CACHE_MASK;
for (i = 0; i < ARRAY_SIZE(cache_policies); i++)
if (cache_policies[i].pmd == pmd) {