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authorJungseung Lee <js07.lee@samsung.com>2015-12-29 05:47:00 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2016-01-04 12:26:40 +0100
commitad84f56bf6d620fe6ed4d57ce6ec9945684d7f35 (patch)
tree85ed24e469d76f07b1d7fd09356af8fa1e540581 /arch/arm/mm/mmu.c
parentARM: 8496/1: OMAP: RX51: save ATAGS data in the early boot stage (diff)
downloadlinux-ad84f56bf6d620fe6ed4d57ce6ec9945684d7f35.tar.xz
linux-ad84f56bf6d620fe6ed4d57ce6ec9945684d7f35.zip
ARM: 8494/1: mm: Enable PXN when running non-LPAE kernel on LPAE processor
The VMSA field of MMFR0 (bottom 4 bits) is incremented for each added feature. PXN is supported if the value is >= 4 and LPAE is supported if it is >= 5. In case a kernel with CONFIG_ARM_LPAE disabled is used on a processor that supports LPAE, we can still use PXN in short descriptors. So check for >= 4 not == 4. Signed-off-by: Jungseung Lee <js07.lee@samsung.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Ben Hutchings <ben@decadent.org.uk> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/mmu.c')
-rw-r--r--arch/arm/mm/mmu.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 4867f5daf82c..de9f8921e407 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -572,7 +572,7 @@ static void __init build_mem_type_table(void)
* in the Short-descriptor translation table format descriptors.
*/
if (cpu_arch == CPU_ARCH_ARMv7 &&
- (read_cpuid_ext(CPUID_EXT_MMFR0) & 0xF) == 4) {
+ (read_cpuid_ext(CPUID_EXT_MMFR0) & 0xF) >= 4) {
user_pmd_table |= PMD_PXNTABLE;
}
#endif