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authorH. Peter Anvin <hpa@linux.intel.com>2012-01-19 21:56:50 +0100
committerH. Peter Anvin <hpa@linux.intel.com>2012-01-19 21:56:50 +0100
commit282f445a779ed76fca9884fe377bf56a3088b208 (patch)
treed9abcf526baee0100672851e0a8894c19e762a39 /arch/arm/mm/proc-arm1022.S
parentx86, tsc: Fix SMI induced variation in quick_pit_calibrate() (diff)
parentuml: fix compile for x86-64 (diff)
downloadlinux-282f445a779ed76fca9884fe377bf56a3088b208.tar.xz
linux-282f445a779ed76fca9884fe377bf56a3088b208.zip
Merge remote-tracking branch 'linus/master' into x86/urgent
Diffstat (limited to 'arch/arm/mm/proc-arm1022.S')
-rw-r--r--arch/arm/mm/proc-arm1022.S3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S
index d283cf3d06e3..38fe22efd18f 100644
--- a/arch/arm/mm/proc-arm1022.S
+++ b/arch/arm/mm/proc-arm1022.S
@@ -84,6 +84,7 @@ ENTRY(cpu_arm1022_proc_fin)
* loc: location to jump to for soft reset
*/
.align 5
+ .pushsection .idmap.text, "ax"
ENTRY(cpu_arm1022_reset)
mov ip, #0
mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
@@ -96,6 +97,8 @@ ENTRY(cpu_arm1022_reset)
bic ip, ip, #0x1100 @ ...i...s........
mcr p15, 0, ip, c1, c0, 0 @ ctrl register
mov pc, r0
+ENDPROC(cpu_arm1022_reset)
+ .popsection
/*
* cpu_arm1022_do_idle()