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author | Catalin Marinas <catalin.marinas@arm.com> | 2008-11-10 15:14:11 +0100 |
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committer | Catalin Marinas <catalin.marinas@arm.com> | 2008-11-10 15:14:11 +0100 |
commit | 8553cb67d2318db327071018fc81084cbabccc46 (patch) | |
tree | f2db64a188cbf2cce745720bf3d279daa2768609 /arch/arm/mm/proc-v6.S | |
parent | ARMv7: Add SMP initialisation to proc-v7.S (diff) | |
download | linux-8553cb67d2318db327071018fc81084cbabccc46.tar.xz linux-8553cb67d2318db327071018fc81084cbabccc46.zip |
Modern processors may need to drain the WB before WFI
Since WFI may cause the processor to enter a low-power mode, data may
still be in the write buffer. This patch adds a DSB (or DWB) to the
cpu_(v6|v7)_do_idle functions before the WFI.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm/mm/proc-v6.S')
-rw-r--r-- | arch/arm/mm/proc-v6.S | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S index 294943b85973..f0cc599facb7 100644 --- a/arch/arm/mm/proc-v6.S +++ b/arch/arm/mm/proc-v6.S @@ -71,6 +71,8 @@ ENTRY(cpu_v6_reset) * IRQs are already disabled. */ ENTRY(cpu_v6_do_idle) + mov r1, #0 + mcr p15, 0, r1, c7, c10, 4 @ DWB - WFI may enter a low-power mode mcr p15, 0, r1, c7, c0, 4 @ wait for interrupt mov pc, lr |