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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2009-03-20 00:10:40 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-03-20 00:10:40 +0100
commit7d83f8fca517b123cf0136503a9e50974f65ec49 (patch)
tree92ed1faaf112e98e29a00efc99e1a4e6c79e6a8e /arch/arm/mm
parent[ARM] pass reboot command line to arch_reset() (diff)
parent[ARM] mv78xx0: Add Marvell RD-78x00-mASA Reference Design support (diff)
downloadlinux-7d83f8fca517b123cf0136503a9e50974f65ec49.tar.xz
linux-7d83f8fca517b123cf0136503a9e50974f65ec49.zip
Merge branch 'master' of git://git.marvell.com/orion into devel
Conflicts: arch/arm/mach-mx1/devices.c
Diffstat (limited to 'arch/arm/mm')
-rw-r--r--arch/arm/mm/copypage-feroceon.c2
-rw-r--r--arch/arm/mm/copypage-v3.c2
-rw-r--r--arch/arm/mm/copypage-v4mc.c2
-rw-r--r--arch/arm/mm/copypage-v4wb.c2
-rw-r--r--arch/arm/mm/copypage-v4wt.c2
-rw-r--r--arch/arm/mm/copypage-xsc3.c2
-rw-r--r--arch/arm/mm/copypage-xscale.c2
7 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/mm/copypage-feroceon.c b/arch/arm/mm/copypage-feroceon.c
index c3ba6a94da0c..70997d5bee2d 100644
--- a/arch/arm/mm/copypage-feroceon.c
+++ b/arch/arm/mm/copypage-feroceon.c
@@ -13,7 +13,7 @@
#include <linux/init.h>
#include <linux/highmem.h>
-static void __attribute__((naked))
+static void __naked
feroceon_copy_user_page(void *kto, const void *kfrom)
{
asm("\
diff --git a/arch/arm/mm/copypage-v3.c b/arch/arm/mm/copypage-v3.c
index 70ed96c8af8e..de9c06854ad7 100644
--- a/arch/arm/mm/copypage-v3.c
+++ b/arch/arm/mm/copypage-v3.c
@@ -15,7 +15,7 @@
*
* FIXME: do we need to handle cache stuff...
*/
-static void __attribute__((naked))
+static void __naked
v3_copy_user_page(void *kto, const void *kfrom)
{
asm("\n\
diff --git a/arch/arm/mm/copypage-v4mc.c b/arch/arm/mm/copypage-v4mc.c
index 1601698b9800..7370a7142b04 100644
--- a/arch/arm/mm/copypage-v4mc.c
+++ b/arch/arm/mm/copypage-v4mc.c
@@ -44,7 +44,7 @@ static DEFINE_SPINLOCK(minicache_lock);
* instruction. If your processor does not supply this, you have to write your
* own copy_user_highpage that does the right thing.
*/
-static void __attribute__((naked))
+static void __naked
mc_copy_user_page(void *from, void *to)
{
asm volatile(
diff --git a/arch/arm/mm/copypage-v4wb.c b/arch/arm/mm/copypage-v4wb.c
index 3ec93dab7656..9ab098414227 100644
--- a/arch/arm/mm/copypage-v4wb.c
+++ b/arch/arm/mm/copypage-v4wb.c
@@ -22,7 +22,7 @@
* instruction. If your processor does not supply this, you have to write your
* own copy_user_highpage that does the right thing.
*/
-static void __attribute__((naked))
+static void __naked
v4wb_copy_user_page(void *kto, const void *kfrom)
{
asm("\
diff --git a/arch/arm/mm/copypage-v4wt.c b/arch/arm/mm/copypage-v4wt.c
index 0f1188efae45..300efafd6643 100644
--- a/arch/arm/mm/copypage-v4wt.c
+++ b/arch/arm/mm/copypage-v4wt.c
@@ -20,7 +20,7 @@
* dirty data in the cache. However, we do have to ensure that
* subsequent reads are up to date.
*/
-static void __attribute__((naked))
+static void __naked
v4wt_copy_user_page(void *kto, const void *kfrom)
{
asm("\
diff --git a/arch/arm/mm/copypage-xsc3.c b/arch/arm/mm/copypage-xsc3.c
index 39a994542cad..bc4525f5ab23 100644
--- a/arch/arm/mm/copypage-xsc3.c
+++ b/arch/arm/mm/copypage-xsc3.c
@@ -29,7 +29,7 @@
* if we eventually end up using our copied page.
*
*/
-static void __attribute__((naked))
+static void __naked
xsc3_mc_copy_user_page(void *kto, const void *kfrom)
{
asm("\
diff --git a/arch/arm/mm/copypage-xscale.c b/arch/arm/mm/copypage-xscale.c
index d18f2397ee2d..76824d3e966a 100644
--- a/arch/arm/mm/copypage-xscale.c
+++ b/arch/arm/mm/copypage-xscale.c
@@ -42,7 +42,7 @@ static DEFINE_SPINLOCK(minicache_lock);
* Dcache aliasing issue. The writes will be forwarded to the write buffer,
* and merged as appropriate.
*/
-static void __attribute__((naked))
+static void __naked
mc_copy_user_page(void *from, void *to)
{
/*