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| author | Dan Williams <dan.j.williams@intel.com> | 2007-02-13 17:13:04 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-02-17 16:04:53 +0100 |
| commit | 4434c5c7fd61c6713de882a2272b66f32fe7cac3 (patch) | |
| tree | f20c9c4eba18dd915f07185cee5ededf33e28c02 /arch/arm/plat-iop | |
| parent | [ARM] 4185/2: entry: introduce get_irqnr_preamble and arch_ret_to_user (diff) | |
| download | linux-4434c5c7fd61c6713de882a2272b66f32fe7cac3.tar.xz linux-4434c5c7fd61c6713de882a2272b66f32fe7cac3.zip | |
[ARM] 4186/1: iop: remove cp6_enable/disable routines
This functionality is replaced by cp6_trap
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/plat-iop')
| -rw-r--r-- | arch/arm/plat-iop/time.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c index f530abdaa7a1..0d53b813cbb4 100644 --- a/arch/arm/plat-iop/time.c +++ b/arch/arm/plat-iop/time.c @@ -51,9 +51,7 @@ iop3xx_timer_interrupt(int irq, void *dev_id) { write_seqlock(&xtime_lock); - iop3xx_cp6_enable(); asm volatile("mcr p6, 0, %0, c6, c1, 0" : : "r" (1)); - iop3xx_cp6_disable(); while ((signed long)(next_jiffy_time - *IOP3XX_TU_TCR1) >= ticks_per_jiffy) { @@ -87,12 +85,10 @@ void __init iop3xx_init_time(unsigned long tick_rate) * We use timer 0 for our timer interrupt, and timer 1 as * monotonic counter for tracking missed jiffies. */ - iop3xx_cp6_enable(); asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (ticks_per_jiffy - 1)); asm volatile("mcr p6, 0, %0, c0, c1, 0" : : "r" (timer_ctl)); asm volatile("mcr p6, 0, %0, c5, c1, 0" : : "r" (0xffffffff)); asm volatile("mcr p6, 0, %0, c1, c1, 0" : : "r" (timer_ctl)); - iop3xx_cp6_disable(); setup_irq(IRQ_IOP3XX_TIMER0, &iop3xx_timer_irq); } |