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authorSudeep KarkadaNagesha <Sudeep.KarkadaNagesha@arm.com>2012-07-31 11:34:25 +0200
committerWill Deacon <will.deacon@arm.com>2012-08-23 12:35:52 +0200
commit051f1b13144dd8553d5a5104dde94c7263ae3ba7 (patch)
treeb9f10b81ace1d986a01c28afddec1f2cc8028e66 /arch/arm/plat-iop
parentARM: perf: move CPU-specific PMU handling code into separate file (diff)
downloadlinux-051f1b13144dd8553d5a5104dde94c7263ae3ba7.tar.xz
linux-051f1b13144dd8553d5a5104dde94c7263ae3ba7.zip
ARM: perf: move irq registration into pmu implementation
This patch moves the CPU-specific IRQ registration and parsing code into the CPU PMU backend. This is required because a PMU may have more than one interrupt, which in turn can be either PPI (per-cpu) or SPI (requiring strict affinity setting at the interrupt distributor). Signed-off-by: Sudeep KarkadaNagesha <Sudeep.KarkadaNagesha@arm.com> [will: cosmetic edits and reworked interrupt dispatching] Signed-off-by: Will Deacon <will.deacon@arm.com>
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