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author | Shawn Guo <shawn.guo@linaro.org> | 2011-10-02 09:09:11 +0200 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2011-10-31 14:26:21 +0100 |
commit | bac89d754ba333453576fd38eb6073d7f89818fe (patch) | |
tree | b53d79778a231d9cb62cacd97910e03ac93da921 /arch/arm/plat-mxc/include/mach/mx6q.h | |
parent | arm/imx6q: add device tree source (diff) | |
download | linux-bac89d754ba333453576fd38eb6073d7f89818fe.tar.xz linux-bac89d754ba333453576fd38eb6073d7f89818fe.zip |
arm/imx6q: add core definitions and low-level debug uart
It adds the core definitions and low-level debug uart support
for imx6q.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/plat-mxc/include/mach/mx6q.h')
-rw-r--r-- | arch/arm/plat-mxc/include/mach/mx6q.h | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/arch/arm/plat-mxc/include/mach/mx6q.h b/arch/arm/plat-mxc/include/mach/mx6q.h new file mode 100644 index 000000000000..254a561a2799 --- /dev/null +++ b/arch/arm/plat-mxc/include/mach/mx6q.h @@ -0,0 +1,33 @@ +/* + * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2011 Linaro Ltd. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __MACH_MX6Q_H__ +#define __MACH_MX6Q_H__ + +#define MX6Q_IO_P2V(x) IMX_IO_P2V(x) +#define MX6Q_IO_ADDRESS(x) IOMEM(MX6Q_IO_P2V(x)) + +/* + * The following are the blocks that need to be statically mapped. + * For other blocks, the base address really should be retrieved from + * device tree. + */ +#define MX6Q_SCU_BASE_ADDR 0x00a00000 +#define MX6Q_SCU_SIZE 0x1000 +#define MX6Q_CCM_BASE_ADDR 0x020c4000 +#define MX6Q_CCM_SIZE 0x4000 +#define MX6Q_ANATOP_BASE_ADDR 0x020c8000 +#define MX6Q_ANATOP_SIZE 0x1000 +#define MX6Q_UART4_BASE_ADDR 0x021f0000 +#define MX6Q_UART4_SIZE 0x4000 + +#endif /* __MACH_MX6Q_H__ */ |