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authorArnd Bergmann <arnd@arndb.de>2011-10-07 21:57:31 +0200
committerArnd Bergmann <arnd@arndb.de>2011-10-07 21:57:31 +0200
commit526b264163068f77c5f2409031f5e25caf3900a9 (patch)
tree196e7581f1546e48ba392ff099f369e5c622636b /arch/arm/plat-mxc/include/mach/system.h
parentARM: mx5: fix clock usage for suspend (diff)
parentMerge branches 'cleanups/mx3-mm-v2' and 'cleanups/mxs' into imx-cleanup (diff)
downloadlinux-526b264163068f77c5f2409031f5e25caf3900a9.tar.xz
linux-526b264163068f77c5f2409031f5e25caf3900a9.zip
Merge branch 'imx/cleanup' into imx/devel
This helps resolve the conflicts between the imx cleanups and the new code that has gone into the imx tree. Conflict resolution was originally done by Sascha Hauer. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/plat-mxc/include/mach/system.h')
-rw-r--r--arch/arm/plat-mxc/include/mach/system.h35
1 files changed, 3 insertions, 32 deletions
diff --git a/arch/arm/plat-mxc/include/mach/system.h b/arch/arm/plat-mxc/include/mach/system.h
index 51f02a9d41a3..cf88b3593fba 100644
--- a/arch/arm/plat-mxc/include/mach/system.h
+++ b/arch/arm/plat-mxc/include/mach/system.h
@@ -17,41 +17,12 @@
#ifndef __ASM_ARCH_MXC_SYSTEM_H__
#define __ASM_ARCH_MXC_SYSTEM_H__
-#include <mach/hardware.h>
-#include <mach/common.h>
-
-extern void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode);
+extern void (*imx_idle)(void);
static inline void arch_idle(void)
{
- /* fix i.MX31 errata TLSbo65953 and i.MX35 errata ENGcm09472 */
- if (cpu_is_mx31() || cpu_is_mx35()) {
- unsigned long reg = 0;
- __asm__ __volatile__(
- /* disable I and D cache */
- "mrc p15, 0, %0, c1, c0, 0\n"
- "bic %0, %0, #0x00001000\n"
- "bic %0, %0, #0x00000004\n"
- "mcr p15, 0, %0, c1, c0, 0\n"
- /* invalidate I cache */
- "mov %0, #0\n"
- "mcr p15, 0, %0, c7, c5, 0\n"
- /* clear and invalidate D cache */
- "mov %0, #0\n"
- "mcr p15, 0, %0, c7, c14, 0\n"
- /* WFI */
- "mov %0, #0\n"
- "mcr p15, 0, %0, c7, c0, 4\n"
- "nop\n" "nop\n" "nop\n" "nop\n"
- "nop\n" "nop\n" "nop\n"
- /* enable I and D cache */
- "mrc p15, 0, %0, c1, c0, 0\n"
- "orr %0, %0, #0x00001000\n"
- "orr %0, %0, #0x00000004\n"
- "mcr p15, 0, %0, c1, c0, 0\n"
- : "=r" (reg));
- } else if (cpu_is_mx51())
- mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
+ if (imx_idle != NULL)
+ (imx_idle)();
else
cpu_do_idle();
}