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author | Samu Onkalo <samu.p.onkalo@nokia.com> | 2010-08-02 13:21:40 +0200 |
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committer | Tony Lindgren <tony@atomide.com> | 2010-08-02 13:21:40 +0200 |
commit | 72a1179ed41e0fc6bd5eb58e02e8d230eba10e24 (patch) | |
tree | bfb28f4becca1ed753c2c0d10d14c4280b9f66b3 /arch/arm/plat-omap/dma.c | |
parent | omap2/3: id: fix sparse warning (diff) | |
download | linux-72a1179ed41e0fc6bd5eb58e02e8d230eba10e24.tar.xz linux-72a1179ed41e0fc6bd5eb58e02e8d230eba10e24.zip |
omap: dma: Support for prefetch in destination synchronizedtransfer
Omap DMA controller can prefetch data in advance in case of
destination synchronized data transfer. This may increase
performance when target HW block doesn't have fifo.
Data is waiting for transfer request in DMA fifo instead of read from memory.
Signed-off-by: Samu Onkalo <samu.p.onkalo@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/plat-omap/dma.c')
-rw-r--r-- | arch/arm/plat-omap/dma.c | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index f7f571e7987e..ec7eddf9e525 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c @@ -290,7 +290,7 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count, val = dma_read(CCR(lch)); /* DMA_SYNCHRO_CONTROL_UPPER depends on the channel number */ - val &= ~((3 << 19) | 0x1f); + val &= ~((1 << 23) | (3 << 19) | 0x1f); val |= (dma_trigger & ~0x1f) << 14; val |= dma_trigger & 0x1f; @@ -304,11 +304,14 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count, else val &= ~(1 << 18); - if (src_or_dst_synch) + if (src_or_dst_synch == OMAP_DMA_DST_SYNC_PREFETCH) { + val &= ~(1 << 24); /* dest synch */ + val |= (1 << 23); /* Prefetch */ + } else if (src_or_dst_synch) { val |= 1 << 24; /* source synch */ - else + } else { val &= ~(1 << 24); /* dest synch */ - + } dma_write(val, CCR(lch)); } |