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authorKevin Hilman <khilman@deeprootsystems.com>2009-01-27 20:15:34 +0100
committerKevin Hilman <khilman@deeprootsystems.com>2010-05-12 18:39:16 +0200
commit8865b9b6d5e1601453ea20c37eb981c6ccc3f4e9 (patch)
tree88c8f10530aee0eea7c7f6be80cccf727e26bb11 /arch/arm/plat-omap/gpio.c
parentOMAP2/3: GPIO: generalize prepare for idle (diff)
downloadlinux-8865b9b6d5e1601453ea20c37eb981c6ccc3f4e9.tar.xz
linux-8865b9b6d5e1601453ea20c37eb981c6ccc3f4e9.zip
OMAP3: GPIO: disable GPIO debounce clocks on idle
Ensure GPIO debounce clocks are disabled when idle. Otherwise, clocks will prevent PER powerdomain from entering retention. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/plat-omap/gpio.c')
-rw-r--r--arch/arm/plat-omap/gpio.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 1c81340ce65c..c6e1de527116 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -196,6 +196,7 @@ struct gpio_bank {
struct gpio_chip chip;
struct clk *dbck;
u32 mod_usage;
+ u32 dbck_enable_mask;
};
#define METHOD_MPUIO 0
@@ -647,6 +648,7 @@ void omap_set_gpio_debounce(int gpio, int enable)
goto done;
if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
+ bank->dbck_enable_mask = val;
if (enable)
clk_enable(bank->dbck);
else
@@ -2054,6 +2056,9 @@ void omap2_gpio_prepare_for_idle(int power_state)
struct gpio_bank *bank = &gpio_bank[i];
u32 l1, l2;
+ if (bank->dbck_enable_mask)
+ clk_disable(bank->dbck);
+
if (power_state > PWRDM_POWER_OFF)
continue;
@@ -2118,6 +2123,9 @@ void omap2_gpio_resume_after_idle(void)
struct gpio_bank *bank = &gpio_bank[i];
u32 l, gen, gen0, gen1;
+ if (bank->dbck_enable_mask)
+ clk_enable(bank->dbck);
+
if (!workaround_enabled)
continue;