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authorKevin Hilman <khilman@deeprootsystems.com>2010-09-23 01:06:27 +0200
committerKevin Hilman <khilman@deeprootsystems.com>2010-09-24 02:14:17 +0200
commit0aed043517ad4135cb458a46e9e99e21cbb59c69 (patch)
tree72fe011933f0e8a66fcb10026d9fe593c282d578 /arch/arm/plat-omap/gpio.c
parentOMAP4: pm: Change l3_main to l3_main_1 during bus device init (diff)
downloadlinux-0aed043517ad4135cb458a46e9e99e21cbb59c69.tar.xz
linux-0aed043517ad4135cb458a46e9e99e21cbb59c69.zip
OMAP: GPIO: ensure debounce clocks are disabled during idle/suspend
If a GPIO bank has more than one GPIO with debounce enabled, the debounce clock will not be fully disabled before going to idle/suspend. In the idle path, we just do a single clk_disable() of the bank's debounce clock. If there are multiple debounce-enabled GPIOs in the bank, that clocks usage count will be > 1, so the clk_disable() will not actually disable the clock. So the fix is to clk_disable() for every debounce-enabled GPIO in the bank (and an equivalent clk_enable() of course.) Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/plat-omap/gpio.c')
-rw-r--r--arch/arm/plat-omap/gpio.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 7951eefe1a0e..11c5b0eefb85 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -2085,8 +2085,9 @@ void omap2_gpio_prepare_for_idle(int power_state)
for (i = min; i < gpio_bank_count; i++) {
struct gpio_bank *bank = &gpio_bank[i];
u32 l1, l2;
+ int j;
- if (bank->dbck_enable_mask)
+ for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
clk_disable(bank->dbck);
if (power_state > PWRDM_POWER_OFF)
@@ -2152,8 +2153,9 @@ void omap2_gpio_resume_after_idle(void)
for (i = min; i < gpio_bank_count; i++) {
struct gpio_bank *bank = &gpio_bank[i];
u32 l, gen, gen0, gen1;
+ int j;
- if (bank->dbck_enable_mask)
+ for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
clk_enable(bank->dbck);
if (!workaround_enabled)