diff options
| author | G, Manjunath Kondaiah <manjugk@ti.com> | 2010-12-21 03:27:18 +0100 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2010-12-21 03:38:29 +0100 |
| commit | d3c9be2f42223f256d06b2b69ed26afdcb02f64a (patch) | |
| tree | 79c5c7cb971e24527773af86572cafcdab6d37a6 /arch/arm/plat-omap/include/plat/dma.h | |
| parent | OMAP: DMA: Replace read/write macros with functions (diff) | |
| download | linux-d3c9be2f42223f256d06b2b69ed26afdcb02f64a.tar.xz linux-d3c9be2f42223f256d06b2b69ed26afdcb02f64a.zip | |
OMAP: DMA: Introduce errata handling feature
Implement errata handling to use flags instead of cpu_is_* and
cpu_class_* in the code.
The errata flags are initialized at init time and during runtime we are
using the errata variable (via the IS_DMA_ERRATA macro) to execute the
required errata workaround.
Reused errata handling patch from: Peter Ujfalusi
<peter.ujfalusi@nokia.com>
https://patchwork.kernel.org/patch/231191/
Changes to above patch:
1. Changes are done for converting all the existing errata work arounds
to use this feature.
2. Detailed description for each errata is added.
3. Fixed bug in SET_DMA_ERRATA macro
4. Bit shifting in macro definitions are replaced with BIT() macro
Signed-off-by: G, Manjunath Kondaiah <manjugk@ti.com>
Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/plat-omap/include/plat/dma.h')
| -rw-r--r-- | arch/arm/plat-omap/include/plat/dma.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/plat-omap/include/plat/dma.h b/arch/arm/plat-omap/include/plat/dma.h index dfb1b10dc920..23783990eb9a 100644 --- a/arch/arm/plat-omap/include/plat/dma.h +++ b/arch/arm/plat-omap/include/plat/dma.h @@ -283,6 +283,18 @@ #define DMA_CH_PRIO_HIGH 0x1 #define DMA_CH_PRIO_LOW 0x0 /* Def */ +/* Errata handling */ +#define IS_DMA_ERRATA(id) (errata & (id)) +#define SET_DMA_ERRATA(id) (errata |= (id)) + +#define DMA_ERRATA_IFRAME_BUFFERING BIT(0x0) +#define DMA_ERRATA_PARALLEL_CHANNELS BIT(0x1) +#define DMA_ERRATA_i378 BIT(0x2) +#define DMA_ERRATA_i541 BIT(0x3) +#define DMA_ERRATA_i88 BIT(0x4) +#define DMA_ERRATA_3_3 BIT(0x5) +#define DMA_ROMCODE_BUG BIT(0x6) + enum omap_reg_offsets { GCR, GSCR, GRST1, HW_ID, |