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authorVikram Pandita <vikram.pandita@ti.com>2009-08-28 20:24:11 +0200
committerTony Lindgren <tony@atomide.com>2009-08-28 20:24:11 +0200
commit57b9daa0e18167e8ba449bc236c3f4a755dd1833 (patch)
treeb3e302c49ff91780b1e1b38cdbb3c7e1cdb550c0 /arch/arm/plat-omap
parentOMAP3: rx51_defconfig: add twl4030 to rx51 default configuration (diff)
downloadlinux-57b9daa0e18167e8ba449bc236c3f4a755dd1833.tar.xz
linux-57b9daa0e18167e8ba449bc236c3f4a755dd1833.zip
OMAP3: MMC: Add mux for pins
For OMAP3 add MMC1 MMC2 pin mux MMC3 mux is not added as there are multiple configurations possible, so the muxing is left to be done in board file. Signed-off-by: Vikram Pandita <vikram.pandita@ti.com> Signed-off-by: Chikkature Rajashekar <madhu.cr@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/plat-omap')
-rw-r--r--arch/arm/plat-omap/include/mach/mux.h28
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm/plat-omap/include/mach/mux.h b/arch/arm/plat-omap/include/mach/mux.h
index 80281c458baf..2c57bad65b02 100644
--- a/arch/arm/plat-omap/include/mach/mux.h
+++ b/arch/arm/plat-omap/include/mach/mux.h
@@ -857,6 +857,34 @@ enum omap34xx_index {
/* OMAP3 SDRC CKE signals to SDR/DDR ram chips */
H16_34XX_SDRC_CKE0,
H17_34XX_SDRC_CKE1,
+
+ /* MMC1 */
+ N28_3430_MMC1_CLK,
+ M27_3430_MMC1_CMD,
+ N27_3430_MMC1_DAT0,
+ N26_3430_MMC1_DAT1,
+ N25_3430_MMC1_DAT2,
+ P28_3430_MMC1_DAT3,
+ P27_3430_MMC1_DAT4,
+ P26_3430_MMC1_DAT5,
+ R27_3430_MMC1_DAT6,
+ R25_3430_MMC1_DAT7,
+
+ /* MMC2 */
+ AE2_3430_MMC2_CLK,
+ AG5_3430_MMC2_CMD,
+ AH5_3430_MMC2_DAT0,
+ AH4_3430_MMC2_DAT1,
+ AG4_3430_MMC2_DAT2,
+ AF4_3430_MMC2_DAT3,
+
+ /* MMC3 */
+ AF10_3430_MMC3_CLK,
+ AC3_3430_MMC3_CMD,
+ AE11_3430_MMC3_DAT0,
+ AH9_3430_MMC3_DAT1,
+ AF13_3430_MMC3_DAT2,
+ AF13_3430_MMC3_DAT3,
};
struct omap_mux_cfg {