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authorHaojian Zhuang <haojian.zhuang@marvell.com>2010-11-24 04:54:19 +0100
committerEric Miao <eric.y.miao@gmail.com>2010-12-18 14:02:14 +0100
commita4553358d94b4a1f3e6f24aacfd076022ac14855 (patch)
tree7d6d7909730801a6f512aa2a7f637353ce0931bf /arch/arm/plat-pxa/include
parentARM: pxa: introduce pxa3xx_clock_sysclass for clock suspend/resume (diff)
downloadlinux-a4553358d94b4a1f3e6f24aacfd076022ac14855.tar.xz
linux-a4553358d94b4a1f3e6f24aacfd076022ac14855.zip
ARM: pxa: support pxa95x
The core of PXA955 is PJ4. Add new PJ4 support. And add new macro CONFIG_PXA95x. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Diffstat (limited to 'arch/arm/plat-pxa/include')
-rw-r--r--arch/arm/plat-pxa/include/plat/mfp.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/plat-pxa/include/plat/mfp.h b/arch/arm/plat-pxa/include/plat/mfp.h
index 9e604c80618f..75f656471240 100644
--- a/arch/arm/plat-pxa/include/plat/mfp.h
+++ b/arch/arm/plat-pxa/include/plat/mfp.h
@@ -423,7 +423,7 @@ typedef unsigned long mfp_cfg_t;
((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DS_MASK | MFP_LPM_STATE_MASK)) |\
(MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_##drv | MFP_LPM_##lpm))
-#if defined(CONFIG_PXA3xx) || defined(CONFIG_ARCH_MMP)
+#if defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x) || defined(CONFIG_ARCH_MMP)
/*
* each MFP pin will have a MFPR register, since the offset of the
* register varies between processors, the processor specific code
@@ -470,6 +470,6 @@ void mfp_write(int mfp, unsigned long mfpr_val);
void mfp_config(unsigned long *mfp_cfgs, int num);
void mfp_config_run(void);
void mfp_config_lpm(void);
-#endif /* CONFIG_PXA3xx || CONFIG_ARCH_MMP */
+#endif /* CONFIG_PXA3xx || CONFIG_PXA95x || CONFIG_ARCH_MMP */
#endif /* __ASM_PLAT_MFP_H */