diff options
author | Heiko Stuebner <heiko@sntech.de> | 2012-05-12 09:22:18 +0200 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2012-05-12 09:22:18 +0200 |
commit | de7bfff1b251395be9a229ee14191105d8d1385d (patch) | |
tree | 38fb42e1a376754d8584fd72daf04c110d29d1b3 /arch/arm/plat-s3c24xx | |
parent | ARM: S3C24XX: move plat-s3c24xx/dev-uart.c into common.c (diff) | |
download | linux-de7bfff1b251395be9a229ee14191105d8d1385d.tar.xz linux-de7bfff1b251395be9a229ee14191105d8d1385d.zip |
ARM: S3C24XX: move common power-management code to mach-s3c24xx
This is the basic power-management code used by all s3c24xx machines.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/plat-s3c24xx')
-rw-r--r-- | arch/arm/plat-s3c24xx/Makefile | 3 | ||||
-rw-r--r-- | arch/arm/plat-s3c24xx/irq-pm.c | 95 | ||||
-rw-r--r-- | arch/arm/plat-s3c24xx/pm.c | 149 | ||||
-rw-r--r-- | arch/arm/plat-s3c24xx/sleep.S | 84 |
4 files changed, 0 insertions, 331 deletions
diff --git a/arch/arm/plat-s3c24xx/Makefile b/arch/arm/plat-s3c24xx/Makefile index 1e3126a2902e..a07bbc933b4e 100644 --- a/arch/arm/plat-s3c24xx/Makefile +++ b/arch/arm/plat-s3c24xx/Makefile @@ -21,9 +21,6 @@ obj-$(CONFIG_CPU_FREQ_S3C24XX_DEBUGFS) += cpu-freq-debugfs.o # Architecture dependent builds -obj-$(CONFIG_PM) += pm.o -obj-$(CONFIG_PM) += irq-pm.o -obj-$(CONFIG_PM) += sleep.o obj-$(CONFIG_S3C2410_CLOCK) += s3c2410-clock.o obj-$(CONFIG_S3C24XX_DMA) += dma.o obj-$(CONFIG_S3C2410_IOTIMING) += s3c2410-iotiming.o diff --git a/arch/arm/plat-s3c24xx/irq-pm.c b/arch/arm/plat-s3c24xx/irq-pm.c deleted file mode 100644 index 0efb2e2848c8..000000000000 --- a/arch/arm/plat-s3c24xx/irq-pm.c +++ /dev/null @@ -1,95 +0,0 @@ -/* linux/arch/arm/plat-s3c24xx/irq-om.c - * - * Copyright (c) 2003-2004 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * http://armlinux.simtec.co.uk/ - * - * S3C24XX - IRQ PM code - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/interrupt.h> -#include <linux/irq.h> - -#include <plat/cpu.h> -#include <plat/pm.h> -#include <plat/irq.h> - -#include <asm/irq.h> - -/* state for IRQs over sleep */ - -/* default is to allow for EINT0..EINT15, and IRQ_RTC as wakeup sources - * - * set bit to 1 in allow bitfield to enable the wakeup settings on it -*/ - -unsigned long s3c_irqwake_intallow = 1L << (IRQ_RTC - IRQ_EINT0) | 0xfL; -unsigned long s3c_irqwake_eintallow = 0x0000fff0L; - -int s3c_irq_wake(struct irq_data *data, unsigned int state) -{ - unsigned long irqbit = 1 << (data->irq - IRQ_EINT0); - - if (!(s3c_irqwake_intallow & irqbit)) - return -ENOENT; - - printk(KERN_INFO "wake %s for irq %d\n", - state ? "enabled" : "disabled", data->irq); - - if (!state) - s3c_irqwake_intmask |= irqbit; - else - s3c_irqwake_intmask &= ~irqbit; - - return 0; -} - -static struct sleep_save irq_save[] = { - SAVE_ITEM(S3C2410_INTMSK), - SAVE_ITEM(S3C2410_INTSUBMSK), -}; - -/* the extint values move between the s3c2410/s3c2440 and the s3c2412 - * so we use an array to hold them, and to calculate the address of - * the register at run-time -*/ - -static unsigned long save_extint[3]; -static unsigned long save_eintflt[4]; -static unsigned long save_eintmask; - -int s3c24xx_irq_suspend(void) -{ - unsigned int i; - - for (i = 0; i < ARRAY_SIZE(save_extint); i++) - save_extint[i] = __raw_readl(S3C24XX_EXTINT0 + (i*4)); - - for (i = 0; i < ARRAY_SIZE(save_eintflt); i++) - save_eintflt[i] = __raw_readl(S3C24XX_EINFLT0 + (i*4)); - - s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save)); - save_eintmask = __raw_readl(S3C24XX_EINTMASK); - - return 0; -} - -void s3c24xx_irq_resume(void) -{ - unsigned int i; - - for (i = 0; i < ARRAY_SIZE(save_extint); i++) - __raw_writel(save_extint[i], S3C24XX_EXTINT0 + (i*4)); - - for (i = 0; i < ARRAY_SIZE(save_eintflt); i++) - __raw_writel(save_eintflt[i], S3C24XX_EINFLT0 + (i*4)); - - s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save)); - __raw_writel(save_eintmask, S3C24XX_EINTMASK); -} diff --git a/arch/arm/plat-s3c24xx/pm.c b/arch/arm/plat-s3c24xx/pm.c deleted file mode 100644 index 60627e63a254..000000000000 --- a/arch/arm/plat-s3c24xx/pm.c +++ /dev/null @@ -1,149 +0,0 @@ -/* linux/arch/arm/plat-s3c24xx/pm.c - * - * Copyright (c) 2004-2006 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * S3C24XX Power Manager (Suspend-To-RAM) support - * - * See Documentation/arm/Samsung-S3C24XX/Suspend.txt for more information - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - * Parts based on arch/arm/mach-pxa/pm.c - * - * Thanks to Dimitry Andric for debugging -*/ - -#include <linux/init.h> -#include <linux/suspend.h> -#include <linux/errno.h> -#include <linux/time.h> -#include <linux/gpio.h> -#include <linux/interrupt.h> -#include <linux/serial_core.h> -#include <linux/io.h> - -#include <plat/regs-serial.h> -#include <mach/regs-clock.h> -#include <mach/regs-gpio.h> -#include <mach/regs-mem.h> -#include <mach/regs-irq.h> - -#include <asm/mach/time.h> - -#include <plat/gpio-cfg.h> -#include <plat/pm.h> - -#define PFX "s3c24xx-pm: " - -static struct sleep_save core_save[] = { - SAVE_ITEM(S3C2410_LOCKTIME), - SAVE_ITEM(S3C2410_CLKCON), - - /* we restore the timings here, with the proviso that the board - * brings the system up in an slower, or equal frequency setting - * to the original system. - * - * if we cannot guarantee this, then things are going to go very - * wrong here, as we modify the refresh and both pll settings. - */ - - SAVE_ITEM(S3C2410_BWSCON), - SAVE_ITEM(S3C2410_BANKCON0), - SAVE_ITEM(S3C2410_BANKCON1), - SAVE_ITEM(S3C2410_BANKCON2), - SAVE_ITEM(S3C2410_BANKCON3), - SAVE_ITEM(S3C2410_BANKCON4), - SAVE_ITEM(S3C2410_BANKCON5), - -#ifndef CONFIG_CPU_FREQ - SAVE_ITEM(S3C2410_CLKDIVN), - SAVE_ITEM(S3C2410_MPLLCON), - SAVE_ITEM(S3C2410_REFRESH), -#endif - SAVE_ITEM(S3C2410_UPLLCON), - SAVE_ITEM(S3C2410_CLKSLOW), -}; - -static struct sleep_save misc_save[] = { - SAVE_ITEM(S3C2410_DCLKCON), -}; - -/* s3c_pm_check_resume_pin - * - * check to see if the pin is configured correctly for sleep mode, and - * make any necessary adjustments if it is not -*/ - -static void s3c_pm_check_resume_pin(unsigned int pin, unsigned int irqoffs) -{ - unsigned long irqstate; - unsigned long pinstate; - int irq = gpio_to_irq(pin); - - if (irqoffs < 4) - irqstate = s3c_irqwake_intmask & (1L<<irqoffs); - else - irqstate = s3c_irqwake_eintmask & (1L<<irqoffs); - - pinstate = s3c_gpio_getcfg(pin); - - if (!irqstate) { - if (pinstate == S3C2410_GPIO_IRQ) - S3C_PMDBG("Leaving IRQ %d (pin %d) as is\n", irq, pin); - } else { - if (pinstate == S3C2410_GPIO_IRQ) { - S3C_PMDBG("Disabling IRQ %d (pin %d)\n", irq, pin); - s3c_gpio_cfgpin(pin, S3C2410_GPIO_INPUT); - } - } -} - -/* s3c_pm_configure_extint - * - * configure all external interrupt pins -*/ - -void s3c_pm_configure_extint(void) -{ - int pin; - - /* for each of the external interrupts (EINT0..EINT15) we - * need to check wether it is an external interrupt source, - * and then configure it as an input if it is not - */ - - for (pin = S3C2410_GPF(0); pin <= S3C2410_GPF(7); pin++) { - s3c_pm_check_resume_pin(pin, pin - S3C2410_GPF(0)); - } - - for (pin = S3C2410_GPG(0); pin <= S3C2410_GPG(7); pin++) { - s3c_pm_check_resume_pin(pin, (pin - S3C2410_GPG(0))+8); - } -} - - -void s3c_pm_restore_core(void) -{ - s3c_pm_do_restore_core(core_save, ARRAY_SIZE(core_save)); - s3c_pm_do_restore(misc_save, ARRAY_SIZE(misc_save)); -} - -void s3c_pm_save_core(void) -{ - s3c_pm_do_save(misc_save, ARRAY_SIZE(misc_save)); - s3c_pm_do_save(core_save, ARRAY_SIZE(core_save)); -} - diff --git a/arch/arm/plat-s3c24xx/sleep.S b/arch/arm/plat-s3c24xx/sleep.S deleted file mode 100644 index c56612569b40..000000000000 --- a/arch/arm/plat-s3c24xx/sleep.S +++ /dev/null @@ -1,84 +0,0 @@ -/* linux/arch/arm/plat-s3c24xx/sleep.S - * - * Copyright (c) 2004 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * S3C2410 Power Manager (Suspend-To-RAM) support - * - * Based on PXA/SA1100 sleep code by: - * Nicolas Pitre, (c) 2002 Monta Vista Software Inc - * Cliff Brake, (c) 2001 - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -*/ - -#include <linux/linkage.h> -#include <asm/assembler.h> -#include <mach/hardware.h> -#include <mach/map.h> - -#include <mach/regs-gpio.h> -#include <mach/regs-clock.h> -#include <mach/regs-mem.h> -#include <plat/regs-serial.h> - -/* CONFIG_DEBUG_RESUME is dangerous if your bootloader does not - * reset the UART configuration, only enable if you really need this! -*/ -//#define CONFIG_DEBUG_RESUME - - .text - - /* sleep magic, to allow the bootloader to check for an valid - * image to resume to. Must be the first word before the - * s3c_cpu_resume entry. - */ - - .word 0x2bedf00d - - /* s3c_cpu_resume - * - * resume code entry for bootloader to call - */ - -ENTRY(s3c_cpu_resume) - mov r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE - msr cpsr_c, r0 - - @@ load UART to allow us to print the two characters for - @@ resume debug - - mov r2, #S3C24XX_PA_UART & 0xff000000 - orr r2, r2, #S3C24XX_PA_UART & 0xff000 - -#if 0 - /* SMDK2440 LED set */ - mov r14, #S3C24XX_PA_GPIO - ldr r12, [ r14, #0x54 ] - bic r12, r12, #3<<4 - orr r12, r12, #1<<7 - str r12, [ r14, #0x54 ] -#endif - -#ifdef CONFIG_DEBUG_RESUME - mov r3, #'L' - strb r3, [ r2, #S3C2410_UTXH ] -1001: - ldrb r14, [ r3, #S3C2410_UTRSTAT ] - tst r14, #S3C2410_UTRSTAT_TXE - beq 1001b -#endif /* CONFIG_DEBUG_RESUME */ - - b cpu_resume |