diff options
author | Dan Williams <dan.j.williams@intel.com> | 2009-09-08 23:32:24 +0200 |
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committer | Dan Williams <dan.j.williams@intel.com> | 2009-09-08 23:32:24 +0200 |
commit | a348a7e6fdbcd2d5192a09719a479bb238fde727 (patch) | |
tree | 5ff94185f4e5a810777469d7fe7832a8ec2d3430 /arch/arm/plat-s3c64xx/setup-sdhci-gpio.c | |
parent | dmaengine: at_hdmac: add DMA slave transfers (diff) | |
parent | Linux 2.6.31-rc1 (diff) | |
download | linux-a348a7e6fdbcd2d5192a09719a479bb238fde727.tar.xz linux-a348a7e6fdbcd2d5192a09719a479bb238fde727.zip |
Merge commit 'v2.6.31-rc1' into dmaengine
Diffstat (limited to 'arch/arm/plat-s3c64xx/setup-sdhci-gpio.c')
-rw-r--r-- | arch/arm/plat-s3c64xx/setup-sdhci-gpio.c | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/arch/arm/plat-s3c64xx/setup-sdhci-gpio.c b/arch/arm/plat-s3c64xx/setup-sdhci-gpio.c new file mode 100644 index 000000000000..5417123b0ac1 --- /dev/null +++ b/arch/arm/plat-s3c64xx/setup-sdhci-gpio.c @@ -0,0 +1,55 @@ +/* linux/arch/arm/plat-s3c64xx/setup-sdhci-gpio.c + * + * Copyright 2008 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * http://armlinux.simtec.co.uk/ + * + * S3C64XX - Helper functions for setting up SDHCI device(s) GPIO (HSMMC) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/interrupt.h> +#include <linux/platform_device.h> +#include <linux/io.h> + +#include <mach/gpio.h> +#include <plat/gpio-cfg.h> + +void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) +{ + unsigned int gpio; + unsigned int end; + + end = S3C64XX_GPG(2 + width); + + /* Set all the necessary GPG pins to special-function 0 */ + for (gpio = S3C64XX_GPG(0); gpio < end; gpio++) { + s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); + s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); + } + + s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP); + s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(2)); +} + +void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) +{ + unsigned int gpio; + unsigned int end; + + end = S3C64XX_GPH(2 + width); + + /* Set all the necessary GPG pins to special-function 0 */ + for (gpio = S3C64XX_GPH(0); gpio < end; gpio++) { + s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); + s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); + } + + s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP); + s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(3)); +} |